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Commit 2924cd18 authored by Ruud Derwig's avatar Ruud Derwig Committed by Vineet Gupta
Browse files

ARCv2: [vdk] dts files and defconfig for HS38 VDK 



 - CONFIG_ARC_UBOOT_SUPPORT to handle arguments passed in r0, r1, r2
 - CONFIG_DEVTMPFS_MOUNT for mouting rootfs since it uses external cpio
   for rootfs

Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: default avatarRuud Derwig <rderwig@synopsys.com>
[vgupta: folded the Main baord DT files for smp/up into one]
Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
parent 5fa2daaa

arch/arc/boot/dts/vdk_axc003.dtsi

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/*

 * Copyright (C) 2013, 2014 Synopsys, Inc. (www.synopsys.com)

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */



/*

 * Device tree for AXC003 CPU card: HS38x UP configuration (VDK version)

 */



/ {

	compatible = "snps,arc";

	clock-frequency = <50000000>;

	#address-cells = <1>;

	#size-cells = <1>;



	cpu_card {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;



		ranges = <0x00000000 0xf0000000 0x10000000>;



		cpu_intc: archs-intc@cpu {

			compatible = "snps,archs-intc";

			interrupt-controller;

			#interrupt-cells = <1>;

		};



		debug_uart: dw-apb-uart@0x5000 {

			compatible = "snps,dw-apb-uart";

			reg = <0x5000 0x100>;

			clock-frequency = <2403200>;

			interrupt-parent = <&cpu_intc>;

			interrupts = <19>;

			baud = <115200>;

			reg-shift = <2>;

			reg-io-width = <4>;

		};



	};



	mb_intc: dw-apb-ictl@0xe0012000 {

		#interrupt-cells = <1>;

		compatible = "snps,dw-apb-ictl";

		reg = < 0xe0012000 0x200 >;

		interrupt-controller;

		interrupt-parent = <&cpu_intc>;

		interrupts = < 18 >;

	};



	memory {

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0x80000000 0x40000000>;

		device_type = "memory";

		reg = <0x00000000 0x20000000>;	/* 512MiB */

	};

};

arch/arc/boot/dts/vdk_axc003_idu.dtsi

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/*

 * Copyright (C) 2014, 2015 Synopsys, Inc. (www.synopsys.com)

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */



/*

 * Device tree for AXC003 CPU card:

 * HS38x2 (Dual Core) with IDU intc (VDK version)

 */



/ {

	compatible = "snps,arc";

	clock-frequency = <50000000>;

	#address-cells = <1>;

	#size-cells = <1>;



	cpu_card {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;



		ranges = <0x00000000 0xf0000000 0x10000000>;



		cpu_intc: archs-intc@cpu {

			compatible = "snps,archs-intc";

			interrupt-controller;

			#interrupt-cells = <1>;

		};



		idu_intc: idu-interrupt-controller {

			compatible = "snps,archs-idu-intc";

			interrupt-controller;

			interrupt-parent = <&cpu_intc>;



			/*

			 * <hwirq  distribution>

			 * distribution: 0=RR; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3

			 */

			#interrupt-cells = <2>;



			interrupts = <24 25 26 27>;

		};



		debug_uart: dw-apb-uart@0x5000 {

			compatible = "snps,dw-apb-uart";

			reg = <0x5000 0x100>;

			clock-frequency = <2403200>;

			interrupt-parent = <&idu_intc>;

			interrupts = <2 0>;

			baud = <115200>;

			reg-shift = <2>;

			reg-io-width = <4>;

		};



	};



	mb_intc: dw-apb-ictl@0xe0012000 {

		#interrupt-cells = <1>;

		compatible = "snps,dw-apb-ictl";

		reg = < 0xe0012000 0x200 >;

		interrupt-controller;

		interrupt-parent = <&idu_intc>;

		interrupts = < 0 0 >;

	};



	memory {

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0x80000000 0x40000000>;

		device_type = "memory";

		reg = <0x00000000 0x20000000>;	/* 512MiB */

	};

};

arch/arc/boot/dts/vdk_axs10x_mb.dtsi

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/*

 * Support for peripherals on the AXS10x mainboard (VDK version)

 *

 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */



/ {

	axs10x_mb_vdk {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0x00000000 0xe0000000 0x10000000>;

		interrupt-parent = <&mb_intc>;



		clocks {

			apbclk: apbclk {

				compatible = "fixed-clock";

				clock-frequency = <50000000>;

				#clock-cells = <0>;

			};



		};



		ethernet@0x18000 {

			#interrupt-cells = <1>;

			compatible = "snps,dwmac";

			reg = < 0x18000 0x2000 >;

			interrupts = < 4 >;

			interrupt-names = "macirq";

			phy-mode = "rgmii";

			snps,phy-addr = < 0 >;  // VDK model phy address is 0

			snps,pbl = < 32 >;

			clocks = <&apbclk>;

			clock-names = "stmmaceth";

		};



		ehci@0x40000 {

			compatible = "generic-ehci";

			reg = < 0x40000 0x100 >;

			interrupts = < 8 >;

		};



		uart@0x20000 {

			compatible = "snps,dw-apb-uart";

			reg = <0x20000 0x100>;

			clock-frequency = <2403200>;

			interrupts = <17>;

			baud = <115200>;

			reg-shift = <2>;

			reg-io-width = <4>;

		};



		uart@0x21000 {

			compatible = "snps,dw-apb-uart";

			reg = <0x21000 0x100>;

			clock-frequency = <2403200>;

			interrupts = <18>;

			baud = <115200>;

			reg-shift = <2>;

			reg-io-width = <4>;

		};



		uart@0x22000 {

			compatible = "snps,dw-apb-uart";

			reg = <0x22000 0x100>;

			clock-frequency = <2403200>;

			interrupts = <19>;

			baud = <115200>;

			reg-shift = <2>;

			reg-io-width = <4>;

		};



/* PGU output directly sent to virtual LCD screen; hdmi controller not modelled */

		pgu@0x17000 {

			compatible = "snps,arcpgufb";

			reg = <0x17000 0x400>;

			clock-frequency = <51000000>; /* PGU'clock is initated in init function */

			/* interrupts = <5>;   PGU interrupts not used, this vector is used for ps2 below */

		};



/* VDK has additional ps2 keyboard/mouse interface integrated in LCD screen model */

		ps2: ps2@e0017400 {

			compatible = "snps,arc_ps2";

			reg = <0x17400 0x14>;

			interrupts = <5>;

			interrupt-names = "arc_ps2_irq";

		};

	};

};

arch/arc/boot/dts/vdk_hs38.dts

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/*

 * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)

 *

 * ARC HS38 Virtual Development Kit (VDK)

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

/dts-v1/;



/include/ "vdk_axc003.dtsi"

/include/ "vdk_axs10x_mb.dtsi"



/ {

	compatible = "snps,axs103";



	chosen {

		bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 consoleblank=0";

	};

};

arch/arc/boot/dts/vdk_hs38_smp.dts

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/*

 * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)

 *

 * ARC HS38 Virtual Development Kit, SMP version (VDK)

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

/dts-v1/;



/include/ "vdk_axc003_idu.dtsi"

/include/ "vdk_axs10x_mb.dtsi"



/ {

	compatible = "snps,axs103";



	chosen {

		bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 consoleblank=0";

	};

};