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Commit 28e47763 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "msm: kgsl: Correctly handle gmu fault interrupts"

parents 9e2e2dad 75992833

drivers/gpu/msm/kgsl_gmu.c

+0 −2
Original line number Diff line number Diff line
@@ -936,8 +936,6 @@ static irqreturn_t gmu_irq_handler(int irq, void *data) 


		dev_err_ratelimited(&gmu->pdev->dev,

				"GMU watchdog expired interrupt received\n");

		adreno_set_gpu_fault(adreno_dev, ADRENO_GMU_FAULT);

		adreno_dispatcher_schedule(device);

	}

	if (status & GMU_INT_HOST_AHB_BUS_ERR)

		dev_err_ratelimited(&gmu->pdev->dev,

drivers/gpu/msm/kgsl_hfi.c

+2 −5
Original line number Diff line number Diff line
@@ -854,7 +854,6 @@ irqreturn_t hfi_irq_handler(int irq, void *data) 
	struct kgsl_device *device = data;

	struct gmu_device *gmu = KGSL_GMU_DEVICE(device);

	struct kgsl_hfi *hfi = &gmu->hfi;

	struct adreno_device *adreno_dev = ADRENO_DEVICE(device);

	unsigned int status = 0;



	adreno_read_gmureg(ADRENO_DEVICE(device),
@@ -864,12 +863,10 @@ irqreturn_t hfi_irq_handler(int irq, void *data) 


	if (status & HFI_IRQ_DBGQ_MASK)

		tasklet_hi_schedule(&hfi->tasklet);

	if (status & HFI_IRQ_CM3_FAULT_MASK) {

	if (status & HFI_IRQ_CM3_FAULT_MASK)

		dev_err_ratelimited(&gmu->pdev->dev,

				"GMU CM3 fault interrupt received\n");

		adreno_set_gpu_fault(adreno_dev, ADRENO_GMU_FAULT);

		adreno_dispatcher_schedule(device);

	}



	if (status & ~HFI_IRQ_MASK)

		dev_err_ratelimited(&gmu->pdev->dev,

				"Unhandled HFI interrupts 0x%lx\n",