Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 28c7ef9e authored by Lionel Landwerlin's avatar Lionel Landwerlin Committed by Ben Widawsky
Browse files

drm/i915/perf: add GLK support 



Add OA support for Geminilake (pretty much identical to Broxton), and
also add the associated OA configurations.

Signed-off-by: default avatarLionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: default avatarMatthew Auld <matthew.auld@intel.com>
Signed-off-by: default avatarBen Widawsky <ben@bwidawsk.net>
Link: http://patchwork.freedesktop.org/patch/msgid/20170613112309.4088-2-lionel.g.landwerlin@intel.com
parent 6c5c1d89

drivers/gpu/drm/i915/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -137,7 +137,8 @@ i915-y += i915_perf.o \ 
	  i915_oa_sklgt4.o \

	  i915_oa_bxt.o \

	  i915_oa_kblgt2.o \

	  i915_oa_kblgt3.o

	  i915_oa_kblgt3.o \

	  i915_oa_glk.o



ifeq ($(CONFIG_DRM_I915_GVT),y)

i915-y += intel_gvt.o

drivers/gpu/drm/i915/i915_oa_glk.c

0 → 100644
+2602 −0

File added.

Preview size limit exceeded, changes collapsed.

drivers/gpu/drm/i915/i915_oa_glk.h

0 → 100644
+40 −0
Original line number Diff line number Diff line 
/*

 * Autogenerated file by GPU Top : https://github.com/rib/gputop

 * DO NOT EDIT manually!

 *

 *

 * Copyright (c) 2015 Intel Corporation

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice (including the next

 * paragraph) shall be included in all copies or substantial portions of the

 * Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING

 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS

 * IN THE SOFTWARE.

 *

 */



#ifndef __I915_OA_GLK_H__

#define __I915_OA_GLK_H__



extern int i915_oa_n_builtin_metric_sets_glk;



extern int i915_oa_select_metric_set_glk(struct drm_i915_private *dev_priv);



extern int i915_perf_register_sysfs_glk(struct drm_i915_private *dev_priv);



extern void i915_perf_unregister_sysfs_glk(struct drm_i915_private *dev_priv);



#endif

drivers/gpu/drm/i915/i915_perf.c

+15 −2
Original line number Diff line number Diff line
@@ -204,6 +204,7 @@ 
#include "i915_oa_bxt.h"

#include "i915_oa_kblgt2.h"

#include "i915_oa_kblgt3.h"

#include "i915_oa_glk.h"



/* HW requires this to be a power of two, between 128k and 16M, though driver

 * is currently generally designed assuming the largest 16M size is used such
@@ -1805,7 +1806,7 @@ static int gen8_enable_metric_set(struct drm_i915_private *dev_priv) 
	 * RPT_ID field.

	 */

	if (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv) ||

	    IS_KABYLAKE(dev_priv)) {

	    IS_KABYLAKE(dev_priv) || IS_GEMINILAKE(dev_priv)) {

		I915_WRITE(GEN8_OA_DEBUG,

			   _MASKED_BIT_ENABLE(GEN9_OA_DEBUG_DISABLE_CLK_RATIO_REPORTS |

					      GEN9_OA_DEBUG_INCLUDE_CLK_RATIO));
@@ -2899,6 +2900,9 @@ void i915_perf_register(struct drm_i915_private *dev_priv) 
				goto sysfs_error;

		} else

			goto sysfs_error;

	} else if (IS_GEMINILAKE(dev_priv)) {

		if (i915_perf_register_sysfs_glk(dev_priv))

			goto sysfs_error;

	}



	goto exit;
@@ -2945,7 +2949,9 @@ void i915_perf_unregister(struct drm_i915_private *dev_priv) 
			i915_perf_unregister_sysfs_kblgt2(dev_priv);

		else if (IS_KBL_GT3(dev_priv))

			i915_perf_unregister_sysfs_kblgt3(dev_priv);

	}

	} else if (IS_GEMINILAKE(dev_priv))

		i915_perf_unregister_sysfs_glk(dev_priv);





	kobject_put(dev_priv->perf.metrics_kobj);

	dev_priv->perf.metrics_kobj = NULL;
@@ -3089,6 +3095,13 @@ void i915_perf_init(struct drm_i915_private *dev_priv) 
					i915_oa_n_builtin_metric_sets_kblgt3;

				dev_priv->perf.oa.ops.select_metric_set =

					i915_oa_select_metric_set_kblgt3;

			} else if (IS_GEMINILAKE(dev_priv)) {

				dev_priv->perf.oa.timestamp_frequency = 19200000;



				dev_priv->perf.oa.n_builtin_sets =

					i915_oa_n_builtin_metric_sets_glk;

				dev_priv->perf.oa.ops.select_metric_set =

					i915_oa_select_metric_set_glk;

			}

		}