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Commit 289c0522 authored by Brian Norris's avatar Brian Norris Committed by Artem Bityutskiy
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mtd: replace DEBUG() with pr_debug()



Start moving away from the MTD_DEBUG_LEVEL messages. The dynamic
debugging feature is a generic kernel feature that provides more
flexibility.

(See Documentation/dynamic-debug-howto.txt)

Also fix some punctuation, indentation, and capitalization that went
along with the affected lines.

Signed-off-by: default avatarBrian Norris <computersforpeace@gmail.com>
Signed-off-by: default avatarArtem Bityutskiy <artem.bityutskiy@intel.com>
parent d0370219
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+12 −15
Original line number Diff line number Diff line
@@ -145,8 +145,7 @@ static void fixup_amd_bootblock(struct mtd_info *mtd)
	if (((major << 8) | minor) < 0x3131) {
		/* CFI version 1.0 => don't trust bootloc */

		DEBUG(MTD_DEBUG_LEVEL1,
			"%s: JEDEC Vendor ID is 0x%02X Device ID is 0x%02X\n",
		pr_debug("%s: JEDEC Vendor ID is 0x%02X Device ID is 0x%02X\n",
			map->name, cfi->mfr, cfi->id);

		/* AFAICS all 29LV400 with a bottom boot block have a device ID
@@ -166,8 +165,7 @@ static void fixup_amd_bootblock(struct mtd_info *mtd)
			 * the 8-bit device ID.
			 */
			(cfi->mfr == CFI_MFR_MACRONIX)) {
			DEBUG(MTD_DEBUG_LEVEL1,
				"%s: Macronix MX29LV400C with bottom boot block"
			pr_debug("%s: Macronix MX29LV400C with bottom boot block"
				" detected\n", map->name);
			extp->TopBottom = 2;	/* bottom boot */
		} else
@@ -178,8 +176,7 @@ static void fixup_amd_bootblock(struct mtd_info *mtd)
			extp->TopBottom = 2;	/* bottom boot */
		}

		DEBUG(MTD_DEBUG_LEVEL1,
			"%s: AMD CFI PRI V%c.%c has no boot block field;"
		pr_debug("%s: AMD CFI PRI V%c.%c has no boot block field;"
			" deduced %s from Device ID\n", map->name, major, minor,
			extp->TopBottom == 2 ? "bottom" : "top");
	}
@@ -191,7 +188,7 @@ static void fixup_use_write_buffers(struct mtd_info *mtd)
	struct map_info *map = mtd->priv;
	struct cfi_private *cfi = map->fldrv_priv;
	if (cfi->cfiq->BufWriteTimeoutTyp) {
		DEBUG(MTD_DEBUG_LEVEL1, "Using buffer write method\n" );
		pr_debug("Using buffer write method\n" );
		mtd->write = cfi_amdstd_write_buffers;
	}
}
@@ -443,7 +440,7 @@ struct mtd_info *cfi_cmdset_0002(struct map_info *map, int primary)
	mtd->writesize = 1;
	mtd->writebufsize = cfi_interleave(cfi) << cfi->cfiq->MaxBufWriteSize;

	DEBUG(MTD_DEBUG_LEVEL3, "MTD %s(): write buffer size %d\n",
	pr_debug("MTD %s(): write buffer size %d\n",
		__func__, mtd->writebufsize);

	mtd->reboot_notifier.notifier_call = cfi_amdstd_reboot;
@@ -1163,7 +1160,7 @@ static int __xipram do_write_oneword(struct map_info *map, struct flchip *chip,
		return ret;
	}

	DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): WRITE 0x%.8lx(0x%.8lx)\n",
	pr_debug("MTD %s(): WRITE 0x%.8lx(0x%.8lx)\n",
	       __func__, adr, datum.x[0] );

	/*
@@ -1174,7 +1171,7 @@ static int __xipram do_write_oneword(struct map_info *map, struct flchip *chip,
	 */
	oldd = map_read(map, adr);
	if (map_word_equal(map, oldd, datum)) {
		DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): NOP\n",
		pr_debug("MTD %s(): NOP\n",
		       __func__);
		goto op_done;
	}
@@ -1400,7 +1397,7 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,

	datum = map_word_load(map, buf);

	DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): WRITE 0x%.8lx(0x%.8lx)\n",
	pr_debug("MTD %s(): WRITE 0x%.8lx(0x%.8lx)\n",
	       __func__, adr, datum.x[0] );

	XIP_INVAL_CACHED_RANGE(map, adr, len);
@@ -1587,7 +1584,7 @@ static int __xipram do_erase_chip(struct map_info *map, struct flchip *chip)
		return ret;
	}

	DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): ERASE 0x%.8lx\n",
	pr_debug("MTD %s(): ERASE 0x%.8lx\n",
	       __func__, chip->start );

	XIP_INVAL_CACHED_RANGE(map, adr, map->size);
@@ -1675,7 +1672,7 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
		return ret;
	}

	DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): ERASE 0x%.8lx\n",
	pr_debug("MTD %s(): ERASE 0x%.8lx\n",
	       __func__, adr );

	XIP_INVAL_CACHED_RANGE(map, adr, len);
@@ -1801,7 +1798,7 @@ static int do_atmel_lock(struct map_info *map, struct flchip *chip,
		goto out_unlock;
	chip->state = FL_LOCKING;

	DEBUG(MTD_DEBUG_LEVEL3, "MTD %s(): LOCK 0x%08lx len %d\n",
	pr_debug("MTD %s(): LOCK 0x%08lx len %d\n",
	      __func__, adr, len);

	cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi,
@@ -1837,7 +1834,7 @@ static int do_atmel_unlock(struct map_info *map, struct flchip *chip,
		goto out_unlock;
	chip->state = FL_UNLOCKING;

	DEBUG(MTD_DEBUG_LEVEL3, "MTD %s(): LOCK 0x%08lx len %d\n",
	pr_debug("MTD %s(): LOCK 0x%08lx len %d\n",
	      __func__, adr, len);

	cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi,
+1 −2
Original line number Diff line number Diff line
@@ -34,8 +34,7 @@ static int fwh_xxlock_oneblock(struct map_info *map, struct flchip *chip,

	/* Refuse the operation if the we cannot look behind the chip */
	if (chip->start < 0x400000) {
		DEBUG( MTD_DEBUG_LEVEL3,
			"MTD %s(): chip->start: %lx wanted >= 0x400000\n",
		pr_debug( "MTD %s(): chip->start: %lx wanted >= 0x400000\n",
			__func__, chip->start );
		return -EIO;
	}
+12 −20
Original line number Diff line number Diff line
@@ -1917,8 +1917,7 @@ static void jedec_reset(u32 base, struct map_info *map, struct cfi_private *cfi)
	 * as they will ignore the writes and don't care what address
	 * the F0 is written to */
	if (cfi->addr_unlock1) {
		DEBUG( MTD_DEBUG_LEVEL3,
		       "reset unlock called %x %x \n",
		pr_debug( "reset unlock called %x %x \n",
		       cfi->addr_unlock1,cfi->addr_unlock2);
		cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
		cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL);
@@ -1941,7 +1940,7 @@ static int cfi_jedec_setup(struct map_info *map, struct cfi_private *cfi, int in
	uint8_t uaddr;

	if (!(jedec_table[index].devtypes & cfi->device_type)) {
		DEBUG(MTD_DEBUG_LEVEL1, "Rejecting potential %s with incompatible %d-bit device type\n",
		pr_debug("Rejecting potential %s with incompatible %d-bit device type\n",
		      jedec_table[index].name, 4 * (1<<cfi->device_type));
		return 0;
	}
@@ -2021,7 +2020,7 @@ static inline int jedec_match( uint32_t base,
		 * there aren't.
		 */
		if (finfo->dev_id > 0xff) {
			DEBUG( MTD_DEBUG_LEVEL3, "%s(): ID is not 8bit\n",
			pr_debug("%s(): ID is not 8bit\n",
			       __func__);
			goto match_done;
		}
@@ -2045,12 +2044,10 @@ static inline int jedec_match( uint32_t base,
	}

	/* the part size must fit in the memory window */
	DEBUG( MTD_DEBUG_LEVEL3,
	       "MTD %s(): Check fit 0x%.8x + 0x%.8x = 0x%.8x\n",
	pr_debug("MTD %s(): Check fit 0x%.8x + 0x%.8x = 0x%.8x\n",
	       __func__, base, 1 << finfo->dev_size, base + (1 << finfo->dev_size) );
	if ( base + cfi_interleave(cfi) * ( 1 << finfo->dev_size ) > map->size ) {
		DEBUG( MTD_DEBUG_LEVEL3,
		       "MTD %s(): 0x%.4x 0x%.4x %dKiB doesn't fit\n",
		pr_debug("MTD %s(): 0x%.4x 0x%.4x %dKiB doesn't fit\n",
		       __func__, finfo->mfr_id, finfo->dev_id,
		       1 << finfo->dev_size );
		goto match_done;
@@ -2061,13 +2058,12 @@ static inline int jedec_match( uint32_t base,

	uaddr = finfo->uaddr;

	DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): check unlock addrs 0x%.4x 0x%.4x\n",
	pr_debug("MTD %s(): check unlock addrs 0x%.4x 0x%.4x\n",
	       __func__, cfi->addr_unlock1, cfi->addr_unlock2 );
	if ( MTD_UADDR_UNNECESSARY != uaddr && MTD_UADDR_DONT_CARE != uaddr
	     && ( unlock_addrs[uaddr].addr1 / cfi->device_type != cfi->addr_unlock1 ||
		  unlock_addrs[uaddr].addr2 / cfi->device_type != cfi->addr_unlock2 ) ) {
		DEBUG( MTD_DEBUG_LEVEL3,
			"MTD %s(): 0x%.4x 0x%.4x did not match\n",
		pr_debug("MTD %s(): 0x%.4x 0x%.4x did not match\n",
			__func__,
			unlock_addrs[uaddr].addr1,
			unlock_addrs[uaddr].addr2);
@@ -2083,15 +2079,13 @@ static inline int jedec_match( uint32_t base,
	 * FIXME - write a driver that takes all of the chip info as
	 * module parameters, doesn't probe but forces a load.
	 */
	DEBUG( MTD_DEBUG_LEVEL3,
	       "MTD %s(): check ID's disappear when not in ID mode\n",
	pr_debug("MTD %s(): check ID's disappear when not in ID mode\n",
	       __func__ );
	jedec_reset( base, map, cfi );
	mfr = jedec_read_mfr( map, base, cfi );
	id = jedec_read_id( map, base, cfi );
	if ( mfr == cfi->mfr && id == cfi->id ) {
		DEBUG( MTD_DEBUG_LEVEL3,
		       "MTD %s(): ID 0x%.2x:0x%.2x did not change after reset:\n"
		pr_debug("MTD %s(): ID 0x%.2x:0x%.2x did not change after reset:\n"
		       "You might need to manually specify JEDEC parameters.\n",
			__func__, cfi->mfr, cfi->id );
		goto match_done;
@@ -2104,7 +2098,7 @@ static inline int jedec_match( uint32_t base,
	 * Put the device back in ID mode - only need to do this if we
	 * were truly frobbing a real device.
	 */
	DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): return to ID mode\n", __func__ );
	pr_debug("MTD %s(): return to ID mode\n", __func__ );
	if (cfi->addr_unlock1) {
		cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
		cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL);
@@ -2167,13 +2161,11 @@ static int jedec_probe_chip(struct map_info *map, __u32 base,

		cfi->mfr = jedec_read_mfr(map, base, cfi);
		cfi->id = jedec_read_id(map, base, cfi);
		DEBUG(MTD_DEBUG_LEVEL3,
		      "Search for id:(%02x %02x) interleave(%d) type(%d)\n",
		pr_debug("Search for id:(%02x %02x) interleave(%d) type(%d)\n",
			cfi->mfr, cfi->id, cfi_interleave(cfi), cfi->device_type);
		for (i = 0; i < ARRAY_SIZE(jedec_table); i++) {
			if ( jedec_match( base, map, cfi, &jedec_table[i] ) ) {
				DEBUG( MTD_DEBUG_LEVEL3,
				       "MTD %s(): matched device 0x%x,0x%x unlock_addrs: 0x%.4x 0x%.4x\n",
				pr_debug("MTD %s(): matched device 0x%x,0x%x unlock_addrs: 0x%.4x 0x%.4x\n",
				       __func__, cfi->mfr, cfi->id,
				       cfi->addr_unlock1, cfi->addr_unlock2 );
				if (!cfi_jedec_setup(map, cfi, i))
+4 −7
Original line number Diff line number Diff line
@@ -82,8 +82,7 @@ static int _DoC_WaitReady(struct DiskOnChip *doc)
	void __iomem *docptr = doc->virtadr;
	unsigned long timeo = jiffies + (HZ * 10);

	DEBUG(MTD_DEBUG_LEVEL3,
	      "_DoC_WaitReady called for out-of-line wait\n");
	pr_debug("_DoC_WaitReady called for out-of-line wait\n");

	/* Out-of-line routine to wait for chip response */
	while (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B)) {
@@ -92,7 +91,7 @@ static int _DoC_WaitReady(struct DiskOnChip *doc)
		DoC_Delay(doc, 2);

		if (time_after(jiffies, timeo)) {
			DEBUG(MTD_DEBUG_LEVEL2, "_DoC_WaitReady timed out.\n");
			pr_debug("_DoC_WaitReady timed out.\n");
			return -EIO;
		}
		udelay(1);
@@ -323,8 +322,7 @@ static int DoC_IdentChip(struct DiskOnChip *doc, int floor, int chip)

	/* Reset the chip */
	if (DoC_Command(doc, NAND_CMD_RESET, CDSN_CTRL_WP)) {
		DEBUG(MTD_DEBUG_LEVEL2,
		      "DoC_Command (reset) for %d,%d returned true\n",
		pr_debug("DoC_Command (reset) for %d,%d returned true\n",
		      floor, chip);
		return 0;
	}
@@ -332,8 +330,7 @@ static int DoC_IdentChip(struct DiskOnChip *doc, int floor, int chip)

	/* Read the NAND chip ID: 1. Send ReadID command */
	if (DoC_Command(doc, NAND_CMD_READID, CDSN_CTRL_WP)) {
		DEBUG(MTD_DEBUG_LEVEL2,
		      "DoC_Command (ReadID) for %d,%d returned true\n",
		pr_debug("DoC_Command (ReadID) for %d,%d returned true\n",
		      floor, chip);
		return 0;
	}
+2 −3
Original line number Diff line number Diff line
@@ -55,15 +55,14 @@ static int _DoC_WaitReady(void __iomem * docptr)
{
	unsigned short c = 0xffff;

	DEBUG(MTD_DEBUG_LEVEL3,
	      "_DoC_WaitReady called for out-of-line wait\n");
	pr_debug("_DoC_WaitReady called for out-of-line wait\n");

	/* Out-of-line routine to wait for chip response */
	while (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B) && --c)
		;

	if (c == 0)
		DEBUG(MTD_DEBUG_LEVEL2, "_DoC_WaitReady timed out.\n");
		pr_debug("_DoC_WaitReady timed out.\n");

	return (c == 0);
}
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