Commit 288be97c authored Jul 12, 2017 by Ard Biesheuvel Committed by Will Deacon Jul 25, 2017

arm64/lib: copy_page: use consistent prefetch stride



The optional prefetch instructions in the copy_page() routine are
inconsistent: at the start of the function, two cachelines are
prefetched beyond the one being loaded in the first iteration, but
in the loop, the prefetch is one more line ahead. This appears to
be unintentional, so let's fix it.

While at it, fix the comment style and white space.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>

parent ece4b206

arch/arm64/lib/copy_page.S

+5 −4

Original line number	Diff line number	Diff line
		@@ -30,9 +30,10 @@
		*/
		ENTRY(copy_page)
		alternative_if ARM64_HAS_NO_HW_PREFETCH
		# Prefetch two cache lines ahead.
		// Prefetch three cache lines ahead.
		prfm pldl1strm, [x1, #128]
		prfm pldl1strm, [x1, #256]
		prfm pldl1strm, [x1, #384]
		alternative_else_nop_endif

		ldp x2, x3, [x1]