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Commit 279ebbca authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
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clk: renesas: r8a7794: Fix LB clock divider



The CLK_TYPE_GEN2_LB clock type is meant for SoCs like R-Car H2, where
the LB clock divider depends on the value of the MD18 pin.

On R-Car E2, the LB clock divider is fixed to 24.  Hence model the clock
as a fixed factor clock instead.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarSimon Horman <horms+renesas@verge.net.au>
Reviewed-by: default avatarFabrizio Castro <fabrizio.castro@bp.renesas.com>
parent 0873305e
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