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Commit 27842bb1 authored by Stephen Boyd's avatar Stephen Boyd Committed by Kumar Gala
Browse files

mmc: Remove msm_sdcc driver 



This driver is orphaned now that mach-msm has been removed.
Delete it.

Cc: Chris Ball <chris@printf.net>
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
Acked-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
Signed-off-by: default avatarKumar Gala <galak@codeaurora.org>
parent 8c7b69ae

drivers/mmc/host/Kconfig

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@@ -393,14 +393,6 @@ config MMC_SDHCI_MSM 


	  If unsure, say N.



config MMC_MSM

	tristate "Qualcomm SDCC Controller Support"

	depends on MMC && (ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50)

	help

	  This provides support for the SD/MMC cell found in the

	  MSM and QSD SOCs from Qualcomm. The controller also has

	  support for SDIO devices.



config MMC_MXC

	tristate "Freescale i.MX21/27/31 or MPC512x Multimedia Card support"

	depends on ARCH_MXC || PPC_MPC512x

drivers/mmc/host/Makefile

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@@ -24,7 +24,6 @@ obj-$(CONFIG_MMC_OMAP) += omap.o 
obj-$(CONFIG_MMC_OMAP_HS)	+= omap_hsmmc.o

obj-$(CONFIG_MMC_ATMELMCI)	+= atmel-mci.o

obj-$(CONFIG_MMC_TIFM_SD)	+= tifm_sd.o

obj-$(CONFIG_MMC_MSM)		+= msm_sdcc.o

obj-$(CONFIG_MMC_MVSDIO)	+= mvsdio.o

obj-$(CONFIG_MMC_DAVINCI)       += davinci_mmc.o

obj-$(CONFIG_MMC_GOLDFISH)	+= android-goldfish.o

drivers/mmc/host/msm_sdcc.c

deleted100644 → 0
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File deleted.

Preview size limit exceeded, changes collapsed.

drivers/mmc/host/msm_sdcc.h

deleted100644 → 0
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/*

 *  linux/drivers/mmc/host/msmsdcc.h - QCT MSM7K SDC Controller

 *

 *  Copyright (C) 2008 Google, All Rights Reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * - Based on mmci.h

 */



#ifndef _MSM_SDCC_H

#define _MSM_SDCC_H



#define MSMSDCC_CRCI_SDC1	6

#define MSMSDCC_CRCI_SDC2	7

#define MSMSDCC_CRCI_SDC3	12

#define MSMSDCC_CRCI_SDC4	13



#define MMCIPOWER		0x000

#define MCI_PWR_OFF		0x00

#define MCI_PWR_UP		0x02

#define MCI_PWR_ON		0x03

#define MCI_OD			(1 << 6)



#define MMCICLOCK		0x004

#define MCI_CLK_ENABLE		(1 << 8)

#define MCI_CLK_PWRSAVE		(1 << 9)

#define MCI_CLK_WIDEBUS		(1 << 10)

#define MCI_CLK_FLOWENA		(1 << 12)

#define MCI_CLK_INVERTOUT	(1 << 13)

#define MCI_CLK_SELECTIN	(1 << 14)



#define MMCIARGUMENT		0x008

#define MMCICOMMAND		0x00c

#define MCI_CPSM_RESPONSE	(1 << 6)

#define MCI_CPSM_LONGRSP	(1 << 7)

#define MCI_CPSM_INTERRUPT	(1 << 8)

#define MCI_CPSM_PENDING	(1 << 9)

#define MCI_CPSM_ENABLE		(1 << 10)

#define MCI_CPSM_PROGENA	(1 << 11)

#define MCI_CSPM_DATCMD		(1 << 12)

#define MCI_CSPM_MCIABORT	(1 << 13)

#define MCI_CSPM_CCSENABLE	(1 << 14)

#define MCI_CSPM_CCSDISABLE	(1 << 15)





#define MMCIRESPCMD		0x010

#define MMCIRESPONSE0		0x014

#define MMCIRESPONSE1		0x018

#define MMCIRESPONSE2		0x01c

#define MMCIRESPONSE3		0x020

#define MMCIDATATIMER		0x024

#define MMCIDATALENGTH		0x028



#define MMCIDATACTRL		0x02c

#define MCI_DPSM_ENABLE		(1 << 0)

#define MCI_DPSM_DIRECTION	(1 << 1)

#define MCI_DPSM_MODE		(1 << 2)

#define MCI_DPSM_DMAENABLE	(1 << 3)



#define MMCIDATACNT		0x030

#define MMCISTATUS		0x034

#define MCI_CMDCRCFAIL		(1 << 0)

#define MCI_DATACRCFAIL		(1 << 1)

#define MCI_CMDTIMEOUT		(1 << 2)

#define MCI_DATATIMEOUT		(1 << 3)

#define MCI_TXUNDERRUN		(1 << 4)

#define MCI_RXOVERRUN		(1 << 5)

#define MCI_CMDRESPEND		(1 << 6)

#define MCI_CMDSENT		(1 << 7)

#define MCI_DATAEND		(1 << 8)

#define MCI_DATABLOCKEND	(1 << 10)

#define MCI_CMDACTIVE		(1 << 11)

#define MCI_TXACTIVE		(1 << 12)

#define MCI_RXACTIVE		(1 << 13)

#define MCI_TXFIFOHALFEMPTY	(1 << 14)

#define MCI_RXFIFOHALFFULL	(1 << 15)

#define MCI_TXFIFOFULL		(1 << 16)

#define MCI_RXFIFOFULL		(1 << 17)

#define MCI_TXFIFOEMPTY		(1 << 18)

#define MCI_RXFIFOEMPTY		(1 << 19)

#define MCI_TXDATAAVLBL		(1 << 20)

#define MCI_RXDATAAVLBL		(1 << 21)

#define MCI_SDIOINTR		(1 << 22)

#define MCI_PROGDONE		(1 << 23)

#define MCI_ATACMDCOMPL		(1 << 24)

#define MCI_SDIOINTOPER		(1 << 25)

#define MCI_CCSTIMEOUT		(1 << 26)



#define MMCICLEAR		0x038

#define MCI_CMDCRCFAILCLR	(1 << 0)

#define MCI_DATACRCFAILCLR	(1 << 1)

#define MCI_CMDTIMEOUTCLR	(1 << 2)

#define MCI_DATATIMEOUTCLR	(1 << 3)

#define MCI_TXUNDERRUNCLR	(1 << 4)

#define MCI_RXOVERRUNCLR	(1 << 5)

#define MCI_CMDRESPENDCLR	(1 << 6)

#define MCI_CMDSENTCLR		(1 << 7)

#define MCI_DATAENDCLR		(1 << 8)

#define MCI_DATABLOCKENDCLR	(1 << 10)



#define MMCIMASK0		0x03c

#define MCI_CMDCRCFAILMASK	(1 << 0)

#define MCI_DATACRCFAILMASK	(1 << 1)

#define MCI_CMDTIMEOUTMASK	(1 << 2)

#define MCI_DATATIMEOUTMASK	(1 << 3)

#define MCI_TXUNDERRUNMASK	(1 << 4)

#define MCI_RXOVERRUNMASK	(1 << 5)

#define MCI_CMDRESPENDMASK	(1 << 6)

#define MCI_CMDSENTMASK		(1 << 7)

#define MCI_DATAENDMASK		(1 << 8)

#define MCI_DATABLOCKENDMASK	(1 << 10)

#define MCI_CMDACTIVEMASK	(1 << 11)

#define MCI_TXACTIVEMASK	(1 << 12)

#define MCI_RXACTIVEMASK	(1 << 13)

#define MCI_TXFIFOHALFEMPTYMASK	(1 << 14)

#define MCI_RXFIFOHALFFULLMASK	(1 << 15)

#define MCI_TXFIFOFULLMASK	(1 << 16)

#define MCI_RXFIFOFULLMASK	(1 << 17)

#define MCI_TXFIFOEMPTYMASK	(1 << 18)

#define MCI_RXFIFOEMPTYMASK	(1 << 19)

#define MCI_TXDATAAVLBLMASK	(1 << 20)

#define MCI_RXDATAAVLBLMASK	(1 << 21)

#define MCI_SDIOINTMASK		(1 << 22)

#define MCI_PROGDONEMASK	(1 << 23)

#define MCI_ATACMDCOMPLMASK	(1 << 24)

#define MCI_SDIOINTOPERMASK	(1 << 25)

#define MCI_CCSTIMEOUTMASK	(1 << 26)



#define MMCIMASK1		0x040

#define MMCIFIFOCNT		0x044

#define MCICCSTIMER		0x058



#define MMCIFIFO		0x080 /* to 0x0bc */



#define MCI_IRQENABLE	\

	(MCI_CMDCRCFAILMASK|MCI_DATACRCFAILMASK|MCI_CMDTIMEOUTMASK|	\

	MCI_DATATIMEOUTMASK|MCI_TXUNDERRUNMASK|MCI_RXOVERRUNMASK|	\

	MCI_CMDRESPENDMASK|MCI_CMDSENTMASK|MCI_DATAENDMASK|MCI_PROGDONEMASK)



#define MCI_IRQ_PIO \

	(MCI_RXDATAAVLBLMASK | MCI_TXDATAAVLBLMASK | MCI_RXFIFOEMPTYMASK | \

	 MCI_TXFIFOEMPTYMASK | MCI_RXFIFOFULLMASK | MCI_TXFIFOFULLMASK | \

	 MCI_RXFIFOHALFFULLMASK | MCI_TXFIFOHALFEMPTYMASK | \

	 MCI_RXACTIVEMASK | MCI_TXACTIVEMASK)

/*

 * The size of the FIFO in bytes.

 */

#define MCI_FIFOSIZE	(16*4)



#define MCI_FIFOHALFSIZE (MCI_FIFOSIZE / 2)



#define NR_SG		32



struct clk;



struct msmsdcc_nc_dmadata {

	dmov_box	cmd[NR_SG];

	uint32_t	cmdptr;

};



struct msmsdcc_dma_data {

	struct msmsdcc_nc_dmadata	*nc;

	dma_addr_t			nc_busaddr;

	dma_addr_t			cmd_busaddr;

	dma_addr_t			cmdptr_busaddr;



	struct msm_dmov_cmd		hdr;

	enum dma_data_direction		dir;



	struct scatterlist		*sg;

	int				num_ents;



	int				channel;

	struct msmsdcc_host		*host;

	int				busy; /* Set if DM is busy */

	int				active;

	unsigned int			result;

	struct msm_dmov_errdata		err;

};



struct msmsdcc_pio_data {

	struct scatterlist	*sg;

	unsigned int		sg_len;

	unsigned int		sg_off;

};



struct msmsdcc_curr_req {

	struct mmc_request	*mrq;

	struct mmc_command	*cmd;

	struct mmc_data		*data;

	unsigned int		xfer_size;	/* Total data size */

	unsigned int		xfer_remain;	/* Bytes remaining to send */

	unsigned int		data_xfered;	/* Bytes acked by BLKEND irq */

	int			got_dataend;

	int			user_pages;

};



struct msmsdcc_stats {

	unsigned int reqs;

	unsigned int cmds;

	unsigned int cmdpoll_hits;

	unsigned int cmdpoll_misses;

};



struct msmsdcc_host {

	struct resource		*cmd_irqres;

	struct resource		*memres;

	struct resource		*dmares;

	void __iomem		*base;

	int			pdev_id;

	unsigned int		stat_irq;



	struct msmsdcc_curr_req	curr;



	struct mmc_host		*mmc;

	struct clk		*clk;		/* main MMC bus clock */

	struct clk		*pclk;		/* SDCC peripheral bus clock */

	unsigned int		clks_on;	/* set if clocks are enabled */

	struct timer_list	busclk_timer;



	unsigned int		eject;		/* eject state */



	spinlock_t		lock;



	unsigned int		clk_rate;	/* Current clock rate */

	unsigned int		pclk_rate;



	u32			pwr;

	u32			saved_irq0mask;	/* MMCIMASK0 reg value */

	struct msm_mmc_platform_data *plat;



	struct timer_list	timer;

	unsigned int		oldstat;



	struct msmsdcc_dma_data	dma;

	struct msmsdcc_pio_data	pio;

	int			cmdpoll;

	struct msmsdcc_stats	stats;



	struct tasklet_struct	dma_tlet;

	/* Command parameters */

	unsigned int		cmd_timeout;

	unsigned int		cmd_pio_irqmask;

	unsigned int		cmd_datactrl;

	struct mmc_command	*cmd_cmd;

	u32			cmd_c;

	bool			gpio_config_status;



	bool prog_scan;

	bool prog_enable;

};



#endif

include/linux/platform_data/mmc-msm_sdcc.h

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#ifndef __MMC_MSM_SDCC_H

#define __MMC_MSM_SDCC_H



#include <linux/mmc/host.h>

#include <linux/mmc/card.h>

#include <linux/mmc/sdio_func.h>



struct msm_mmc_gpio {

	unsigned no;

	const char *name;

};



struct msm_mmc_gpio_data {

	struct msm_mmc_gpio *gpio;

	u8 size;

};



struct msm_mmc_platform_data {

	unsigned int ocr_mask;			/* available voltages */

	u32 (*translate_vdd)(struct device *, unsigned int);

	unsigned int (*status)(struct device *);

	int (*register_status_notify)(void (*callback)(int card_present, void *dev_id), void *dev_id);

	struct msm_mmc_gpio_data *gpio_data;

	void (*init_card)(struct mmc_card *card);

};



#endif