Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 274df7fb authored by Nogah Frankel's avatar Nogah Frankel Committed by David S. Miller
Browse files

mlxsw: pci: Add max router interface resource



Add the max number of rif (router interfaces) to resource query.

Signed-off-by: default avatarNogah Frankel <nogahf@mellanox.com>
Reviewed-by: default avatarIdo Schimmel <idosch@mellanox.com>
Signed-off-by: default avatarJiri Pirko <jiri@mellanox.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent e44d49cb
Loading
Loading
Loading
Loading
+3 −1
Original line number Diff line number Diff line
@@ -276,7 +276,8 @@ struct mlxsw_resources {
		max_virtual_routers_valid:1,
		max_system_ports_valid:1,
		max_vlan_groups_valid:1,
		max_regions_valid:1;
		max_regions_valid:1,
		max_rif_valid:1;
	u8      max_span;
	u8	max_lag;
	u8	max_ports_in_lag;
@@ -287,6 +288,7 @@ struct mlxsw_resources {
	u16	max_system_ports;
	u16	max_vlan_groups;
	u16	max_regions;
	u16	max_rif;

	/* Internal resources.
	 * Determined by the SW, not queried from the HW.
+5 −0
Original line number Diff line number Diff line
@@ -1165,6 +1165,7 @@ mlxsw_pci_config_profile_swid_config(struct mlxsw_pci *mlxsw_pci,
#define MLXSW_MAX_SYSTEM_PORT_ID 0x2502
#define MLXSW_MAX_VLAN_GROUPS_ID 0x2906
#define MLXSW_MAX_REGIONS_ID 0x2901
#define MLXSW_MAX_RIF_ID 0x2C02
#define MLXSW_RESOURCES_QUERY_MAX_QUERIES 100
#define MLXSW_RESOURCES_PER_QUERY 32

@@ -1212,6 +1213,10 @@ static void mlxsw_pci_resources_query_parse(int id, u64 val,
		resources->max_regions = val;
		resources->max_regions_valid = 1;
		break;
	case MLXSW_MAX_RIF_ID:
		resources->max_rif = val;
		resources->max_rif_valid = 1;
		break;
	default:
		break;
	}