Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 267dd0a0 authored by Ingo Molnar's avatar Ingo Molnar
Browse files

Merge tag 'perf-core-for-mingo-4.12-20170320' of... 

Merge tag 'perf-core-for-mingo-4.12-20170320' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux

 into perf/core

Pull perf/core improvements and fixes from Arnaldo Carvalho de Melo:

Fixes:

- Fix concat_probe_trace_events() in 'perf probe', it should dereference a
  pointer, not test its value (Ravi Bangoria)

User visible changes:

- Handle partial AUX records, checking if 'kvm_intel.ko' is loaded and
  if its 'vmm_exclusive' parameter is set to 0, suggesting tweaking
  it to reduce gaps (Alexander Shishkin)

Infrastructure changes:

- Sync the kvm.h, cpufeatures.h and perf_event.h tools/ headers copies
  with the kernel (Arnaldo Carvalho de Melo, Alexander Shishkin)

- 'perf lock' subcommands should include common options, using
  OPT_PARENT() (Changbin Du)

- Ditto for 'perf timechart' (Arnaldo Carvalho de Melo)

Documentation changes:

  Correct 'perf stat --no-aggr' description (Ravi Bangoria)

Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parents 61f63e38 affa6c16

tools/arch/arm/include/uapi/asm/kvm.h

+13 −0
Original line number Diff line number Diff line
@@ -181,10 +181,23 @@ struct kvm_arch_memory_slot { 
#define KVM_DEV_ARM_VGIC_GRP_CPU_REGS	2

#define   KVM_DEV_ARM_VGIC_CPUID_SHIFT	32

#define   KVM_DEV_ARM_VGIC_CPUID_MASK	(0xffULL << KVM_DEV_ARM_VGIC_CPUID_SHIFT)

#define   KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT 32

#define   KVM_DEV_ARM_VGIC_V3_MPIDR_MASK \

			(0xffffffffULL << KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT)

#define   KVM_DEV_ARM_VGIC_OFFSET_SHIFT	0

#define   KVM_DEV_ARM_VGIC_OFFSET_MASK	(0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT)

#define   KVM_DEV_ARM_VGIC_SYSREG_INSTR_MASK (0xffff)

#define KVM_DEV_ARM_VGIC_GRP_NR_IRQS	3

#define KVM_DEV_ARM_VGIC_GRP_CTRL       4

#define KVM_DEV_ARM_VGIC_GRP_REDIST_REGS 5

#define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6

#define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO  7

#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT	10

#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK \

			(0x3fffffULL << KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT)

#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK 0x3ff

#define VGIC_LEVEL_INFO_LINE_LEVEL	0



#define   KVM_DEV_ARM_VGIC_CTRL_INIT    0



/* KVM_IRQ_LINE irq field index values */

tools/arch/arm64/include/uapi/asm/kvm.h

+13 −0
Original line number Diff line number Diff line
@@ -201,10 +201,23 @@ struct kvm_arch_memory_slot { 
#define KVM_DEV_ARM_VGIC_GRP_CPU_REGS	2

#define   KVM_DEV_ARM_VGIC_CPUID_SHIFT	32

#define   KVM_DEV_ARM_VGIC_CPUID_MASK	(0xffULL << KVM_DEV_ARM_VGIC_CPUID_SHIFT)

#define   KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT 32

#define   KVM_DEV_ARM_VGIC_V3_MPIDR_MASK \

			(0xffffffffULL << KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT)

#define   KVM_DEV_ARM_VGIC_OFFSET_SHIFT	0

#define   KVM_DEV_ARM_VGIC_OFFSET_MASK	(0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT)

#define   KVM_DEV_ARM_VGIC_SYSREG_INSTR_MASK (0xffff)

#define KVM_DEV_ARM_VGIC_GRP_NR_IRQS	3

#define KVM_DEV_ARM_VGIC_GRP_CTRL	4

#define KVM_DEV_ARM_VGIC_GRP_REDIST_REGS 5

#define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6

#define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO  7

#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT	10

#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK \

			(0x3fffffULL << KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT)

#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK	0x3ff

#define VGIC_LEVEL_INFO_LINE_LEVEL	0



#define   KVM_DEV_ARM_VGIC_CTRL_INIT	0



/* Device Control API on vcpu fd */

tools/arch/powerpc/include/uapi/asm/kvm.h

+22 −0
Original line number Diff line number Diff line
@@ -413,6 +413,26 @@ struct kvm_get_htab_header { 
	__u16	n_invalid;

};



/* For KVM_PPC_CONFIGURE_V3_MMU */

struct kvm_ppc_mmuv3_cfg {

	__u64	flags;

	__u64	process_table;	/* second doubleword of partition table entry */

};



/* Flag values for KVM_PPC_CONFIGURE_V3_MMU */

#define KVM_PPC_MMUV3_RADIX	1	/* 1 = radix mode, 0 = HPT */

#define KVM_PPC_MMUV3_GTSE	2	/* global translation shootdown enb. */



/* For KVM_PPC_GET_RMMU_INFO */

struct kvm_ppc_rmmu_info {

	struct kvm_ppc_radix_geom {

		__u8	page_shift;

		__u8	level_bits[4];

		__u8	pad[3];

	}	geometries[8];

	__u32	ap_encodings[8];

};



/* Per-vcpu XICS interrupt controller state */

#define KVM_REG_PPC_ICP_STATE	(KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x8c)
@@ -613,5 +633,7 @@ struct kvm_get_htab_header { 
#define  KVM_XICS_LEVEL_SENSITIVE	(1ULL << 40)

#define  KVM_XICS_MASKED		(1ULL << 41)

#define  KVM_XICS_PENDING		(1ULL << 42)

#define  KVM_XICS_PRESENTED		(1ULL << 43)

#define  KVM_XICS_QUEUED		(1ULL << 44)



#endif /* __LINUX_KVM_POWERPC_H */

tools/arch/x86/include/asm/cpufeatures.h

+2 −1
Original line number Diff line number Diff line
@@ -289,6 +289,7 @@ 
#define X86_FEATURE_PKU		(16*32+ 3) /* Protection Keys for Userspace */

#define X86_FEATURE_OSPKE	(16*32+ 4) /* OS Protection Keys Enable */

#define X86_FEATURE_AVX512_VPOPCNTDQ (16*32+14) /* POPCNT for vectors of DW/QW */

#define X86_FEATURE_LA57	(16*32+16) /* 5-level page tables */

#define X86_FEATURE_RDPID	(16*32+22) /* RDPID instruction */



/* AMD-defined CPU features, CPUID level 0x80000007 (ebx), word 17 */

tools/include/uapi/linux/perf_event.h

+1 −0
Original line number Diff line number Diff line
@@ -915,6 +915,7 @@ enum perf_callchain_context { 
 */

#define PERF_AUX_FLAG_TRUNCATED		0x01	/* record was truncated to fit */

#define PERF_AUX_FLAG_OVERWRITE		0x02	/* snapshot from overwrite mode */

#define PERF_AUX_FLAG_PARTIAL		0x04	/* record contains gaps */



#define PERF_FLAG_FD_NO_GROUP		(1UL << 0)

#define PERF_FLAG_FD_OUTPUT		(1UL << 1)