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Commit 24ef12e8 authored by Rajeev Nandan's avatar Rajeev Nandan
Browse files

disp: msm: dsi: fix t_clk_pre in high dsi clock use case 



The t_clk_pre extend register used to configure the
resolution of the t_clk_pre setting. Without this set, the
duration of the t_clk_pre would be half of what is needed.
This change adds the provision to configure this register.

Change-Id: Iac12ac3da949e042fd560fa3945a97555d1283e6
Signed-off-by: default avatarRajeev Nandan <rajeevny@codeaurora.org>
parent 454ccc1e

msm/dsi/dsi_ctrl_hw_cmn.c

+9 −1
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.

 * Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.

 */



#include <linux/delay.h>
@@ -92,6 +92,14 @@ void dsi_ctrl_hw_cmn_host_setup(struct dsi_ctrl_hw *ctrl, 
	dsi_setup_trigger_controls(ctrl, cfg);

	dsi_split_link_setup(ctrl, cfg);



	/* Setup T_CLK_PRE extend register */

	reg_value = DSI_R32(ctrl, DSI_TEST_PATTERN_GEN_VIDEO_ENABLE);

	if (cfg->t_clk_pre_extend)

		reg_value |= BIT(0);

	else

		reg_value &= ~BIT(0);

	DSI_W32(ctrl, DSI_TEST_PATTERN_GEN_VIDEO_ENABLE, reg_value);



	/* Setup clocking timing controls */

	reg_value = ((cfg->t_clk_post & 0x3F) << 8);

	reg_value |= (cfg->t_clk_pre & 0x3F);

msm/dsi/dsi_defs.h

+3 −0
Original line number Diff line number Diff line
@@ -479,6 +479,8 @@ struct dsi_split_link_config { 
 * @t_clk_pre:           Number of byte clock cycles that the high spped clock

 *                       shall be driven prior to data lane transitions from LP

 *                       to HS mode.

 * @t_clk_pre_extend:    Increment t_clk_pre counter by 2 byteclk if set to

 *                       true, otherwise increment by 1 byteclk.

 * @ignore_rx_eot:       Ignore Rx EOT packets if set to true.

 * @append_tx_eot:       Append EOT packets for forward transmissions if set to

 *                       true.
@@ -505,6 +507,7 @@ struct dsi_host_common_cfg { 
	bool bit_swap_blue;

	u32 t_clk_post;

	u32 t_clk_pre;

	bool t_clk_pre_extend;

	bool ignore_rx_eot;

	bool append_tx_eot;

	bool ext_bridge_mode;

msm/dsi/dsi_panel.c

+3 −0
Original line number Diff line number Diff line
@@ -1194,6 +1194,9 @@ static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host, 
		DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);

	}



	host->t_clk_pre_extend = utils->read_bool(utils->data,

						"qcom,mdss-dsi-t-clk-pre-extend");



	host->ignore_rx_eot = utils->read_bool(utils->data,

						"qcom,mdss-dsi-rx-eot-ignore");