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Commit 242a9eb6 authored by Naveen Yadav's avatar Naveen Yadav
Browse files

clk: qcom: gcc-scuba: Remove support for GPU throttle XO clock 



The GPU throttle XO clock would be enabled previously to high level
OS clock driver and thus remove the support for the clock.

Change-Id: I69c8915e20ee5855fc95c7467e314ba51b7988a7
Signed-off-by: default avatarNaveen Yadav <naveenky@codeaurora.org>
parent 0bdcb849

drivers/clk/qcom/debugcc-scuba.c

+0 −2
Original line number Diff line number Diff line
@@ -156,7 +156,6 @@ static const char *const gcc_debug_mux_parent_names[] = { 
	"gcc_gpu_memnoc_gfx_clk",

	"gcc_gpu_snoc_dvm_gfx_clk",

	"gcc_gpu_throttle_core_clk",

	"gcc_gpu_throttle_xo_clk",

	"gcc_mss_vs_clk",

	"gcc_pdm2_clk",

	"gcc_pdm_ahb_clk",
@@ -267,7 +266,6 @@ static int gcc_debug_mux_sels[] = { 
	0xE4,		/* gcc_gpu_memnoc_gfx_clk */

	0xE6,		/* gcc_gpu_snoc_dvm_gfx_clk */

	0xEB,		/* gcc_gpu_throttle_core_clk */

	0xEA,		/* gcc_gpu_throttle_xo_clk */

	0xBE,		/* gcc_mss_vs_clk */

	0x72,		/* gcc_pdm2_clk */

	0x70,		/* gcc_pdm_ahb_clk */

drivers/clk/qcom/gcc-scuba.c

+0 −14
Original line number Diff line number Diff line
@@ -2465,19 +2465,6 @@ static struct clk_branch gcc_gpu_throttle_core_clk = { 
	},

};



static struct clk_branch gcc_gpu_throttle_xo_clk = {

	.halt_reg = 0x36044,

	.halt_check = BRANCH_HALT,

	.clkr = {

		.enable_reg = 0x36044,

		.enable_mask = BIT(0),

		.hw.init = &(struct clk_init_data){

			.name = "gcc_gpu_throttle_xo_clk",

			.ops = &clk_branch2_ops,

		},

	},

};



static struct clk_branch gcc_pdm2_clk = {

	.halt_reg = 0x2000c,

	.halt_check = BRANCH_HALT,
@@ -3192,7 +3179,6 @@ static struct clk_regmap *gcc_scuba_clocks[] = { 
	[GCC_GPU_MEMNOC_GFX_CLK] = &gcc_gpu_memnoc_gfx_clk.clkr,

	[GCC_GPU_SNOC_DVM_GFX_CLK] = &gcc_gpu_snoc_dvm_gfx_clk.clkr,

	[GCC_GPU_THROTTLE_CORE_CLK] = &gcc_gpu_throttle_core_clk.clkr,

	[GCC_GPU_THROTTLE_XO_CLK] = &gcc_gpu_throttle_xo_clk.clkr,

	[GCC_PDM2_CLK] = &gcc_pdm2_clk.clkr,

	[GCC_PDM2_CLK_SRC] = &gcc_pdm2_clk_src.clkr,

	[GCC_PDM_AHB_CLK] = &gcc_pdm_ahb_clk.clkr,