Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 23c6f9f6 authored by Johan Jonker's avatar Johan Jonker Committed by Greg Kroah-Hartman
Browse files

arm64: dts: rockchip: fix rk3399 hdmi ports node 



[ Upstream commit f051b6ace7ffcc48d6d1017191f167c0a85799f6 ]

Fix rk3399 hdmi ports node so that it matches the
rockchip,dw-hdmi.yaml binding.

Signed-off-by: default avatarJohan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/a6ab6f75-3b80-40b1-bd30-3113e14becdd@gmail.com


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent e87bb99d

arch/arm64/boot/dts/rockchip/rk3399.dtsi

+10 −2
Original line number Original line Diff line number Diff line
@@ -1683,6 +1683,7 @@ 
	hdmi: hdmi@ff940000 {

	hdmi: hdmi@ff940000 {

		compatible = "rockchip,rk3399-dw-hdmi";

		compatible = "rockchip,rk3399-dw-hdmi";

		reg = <0x0 0xff940000 0x0 0x20000>;

		reg = <0x0 0xff940000 0x0 0x20000>;

		reg-io-width = <4>;

		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;

		interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>;

		clocks = <&cru PCLK_HDMI_CTRL>,

		clocks = <&cru PCLK_HDMI_CTRL>,

			 <&cru SCLK_HDMI_SFR>,

			 <&cru SCLK_HDMI_SFR>,
@@ -1691,13 +1692,16 @@ 
			 <&cru PLL_VPLL>;

			 <&cru PLL_VPLL>;

		clock-names = "iahb", "isfr", "cec", "grf", "vpll";

		clock-names = "iahb", "isfr", "cec", "grf", "vpll";

		power-domains = <&power RK3399_PD_HDCP>;

		power-domains = <&power RK3399_PD_HDCP>;

		reg-io-width = <4>;

		rockchip,grf = <&grf>;

		rockchip,grf = <&grf>;

		#sound-dai-cells = <0>;

		#sound-dai-cells = <0>;

		status = "disabled";

		status = "disabled";





		ports {

		ports {

			hdmi_in: port {

			#address-cells = <1>;

			#size-cells = <0>;



			hdmi_in: port@0 {

				reg = <0>;

				#address-cells = <1>;

				#address-cells = <1>;

				#size-cells = <0>;

				#size-cells = <0>;
@@ -1710,6 +1714,10 @@ 
					remote-endpoint = <&vopl_out_hdmi>;

					remote-endpoint = <&vopl_out_hdmi>;

				};

				};

			};

			};



			hdmi_out: port@1 {

				reg = <1>;

			};

		};

		};

	};

	};