Commit 2280fa97 authored Aug 08, 2019 by Sriharsha Allenki Committed by Gerrit - the friendly Code Review server Jan 22, 2020

usb: dwc3: gadget: Prevent core from processing stale TRBs



With CPU re-ordering on write instructions, there might
be a chance that the HWO is set before the TRB is updated
with the new mapped buffer address.
And in the case where core is processing a list of TRBs
it is possible that it fetched the TRBs when the HWO is set
but before the buffer address is updated.
Prevent this by adding a memory barrier before the HWO
is updated to ensure that the core always process the
updated TRBs.

Change-Id: Idc008b2d4e37dd0c10c8ae40ab5af1ffd0775877
Signed-off-by: Sriharsha Allenki <sallenki@codeaurora.org>

parent 38ae0c3a

drivers/usb/dwc3/gadget.c

+6 −0

Original line number	Diff line number	Diff line
		@@ -1200,6 +1200,12 @@ static void __dwc3_prepare_one_trb(struct dwc3_ep dep, struct dwc3_trb trb,
		if (usb_endpoint_xfer_bulk(dep->endpoint.desc) && dep->stream_capable)
		trb->ctrl \|= DWC3_TRB_CTRL_SID_SOFN(stream_id);

		/*
		* Ensure that updates of buffer address and size happens
		* before we set the DWC3_TRB_CTRL_HWO so that core
		* does not process any stale TRB.
		*/
		mb();
		trb->ctrl \|= DWC3_TRB_CTRL_HWO;

		dwc3_ep_inc_enq(dep);