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Commit 223aa646 authored by Ingo Molnar's avatar Ingo Molnar
Browse files

Merge branch 'perf/timer' into perf/core



This WIP branch is now ready to be merged.

Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parents aaa9fa38 34f43927
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+10 −3
Original line number Diff line number Diff line
@@ -1186,7 +1186,7 @@ M: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S:	Maintained
F:	arch/arm/mach-mvebu/
F:	drivers/rtc/armada38x-rtc
F:	drivers/rtc/rtc-armada38x.c

ARM/Marvell Berlin SoC support
M:	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
@@ -1675,8 +1675,8 @@ F: drivers/misc/eeprom/at24.c
F:	include/linux/platform_data/at24.h

ATA OVER ETHERNET (AOE) DRIVER
M:	"Ed L. Cashin" <ecashin@coraid.com>
W:	http://support.coraid.com/support/linux
M:	"Ed L. Cashin" <ed.cashin@acm.org>
W:	http://www.openaoe.org/
S:	Supported
F:	Documentation/aoe/
F:	drivers/block/aoe/
@@ -3252,6 +3252,13 @@ S: Maintained
F:	Documentation/hwmon/dme1737
F:	drivers/hwmon/dme1737.c

DMI/SMBIOS SUPPORT
M:	Jean Delvare <jdelvare@suse.de>
S:	Maintained
F:	drivers/firmware/dmi-id.c
F:	drivers/firmware/dmi_scan.c
F:	include/linux/dmi.h

DOCKING STATION DRIVER
M:	Shaohua Li <shaohua.li@intel.com>
L:	linux-acpi@vger.kernel.org
+1 −1
Original line number Diff line number Diff line
@@ -103,7 +103,7 @@ int __init omap_init_clocksource_32k(void __iomem *vbase)

	/*
	 * 120000 rough estimate from the calculations in
	 * __clocksource_updatefreq_scale.
	 * __clocksource_update_freq_scale.
	 */
	clocks_calc_mult_shift(&persistent_mult, &persistent_shift,
			32768, NSEC_PER_SEC, 120000);
+24 −8
Original line number Diff line number Diff line
@@ -246,14 +246,30 @@ static inline unsigned long __cmpxchg_mb(volatile void *ptr, unsigned long old,
	__ret; \
})

#define this_cpu_cmpxchg_1(ptr, o, n) cmpxchg_local(raw_cpu_ptr(&(ptr)), o, n)
#define this_cpu_cmpxchg_2(ptr, o, n) cmpxchg_local(raw_cpu_ptr(&(ptr)), o, n)
#define this_cpu_cmpxchg_4(ptr, o, n) cmpxchg_local(raw_cpu_ptr(&(ptr)), o, n)
#define this_cpu_cmpxchg_8(ptr, o, n) cmpxchg_local(raw_cpu_ptr(&(ptr)), o, n)
#define _protect_cmpxchg_local(pcp, o, n)			\
({								\
	typeof(*raw_cpu_ptr(&(pcp))) __ret;			\
	preempt_disable();					\
	__ret = cmpxchg_local(raw_cpu_ptr(&(pcp)), o, n);	\
	preempt_enable();					\
	__ret;							\
})

#define this_cpu_cmpxchg_1(ptr, o, n) _protect_cmpxchg_local(ptr, o, n)
#define this_cpu_cmpxchg_2(ptr, o, n) _protect_cmpxchg_local(ptr, o, n)
#define this_cpu_cmpxchg_4(ptr, o, n) _protect_cmpxchg_local(ptr, o, n)
#define this_cpu_cmpxchg_8(ptr, o, n) _protect_cmpxchg_local(ptr, o, n)

#define this_cpu_cmpxchg_double_8(ptr1, ptr2, o1, o2, n1, n2)		\
	cmpxchg_double_local(raw_cpu_ptr(&(ptr1)), raw_cpu_ptr(&(ptr2)), \
				o1, o2, n1, n2)
({									\
	int __ret;							\
	preempt_disable();						\
	__ret = cmpxchg_double_local(	raw_cpu_ptr(&(ptr1)),		\
					raw_cpu_ptr(&(ptr2)),		\
					o1, o2, n1, n2);		\
	preempt_enable();						\
	__ret;								\
})

#define cmpxchg64(ptr,o,n)		cmpxchg((ptr),(o),(n))
#define cmpxchg64_local(ptr,o,n)	cmpxchg_local((ptr),(o),(n))
+9 −0
Original line number Diff line number Diff line
@@ -151,6 +151,15 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,
{
	unsigned int cpu = smp_processor_id();

	/*
	 * init_mm.pgd does not contain any user mappings and it is always
	 * active for kernel addresses in TTBR1. Just set the reserved TTBR0.
	 */
	if (next == &init_mm) {
		cpu_set_reserved_ttbr0();
		return;
	}

	if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next)) || prev != next)
		check_and_switch_context(next, tsk);
}
+33 −11
Original line number Diff line number Diff line
@@ -204,25 +204,47 @@ static inline unsigned long __percpu_xchg(void *ptr, unsigned long val,
	return ret;
}

#define _percpu_read(pcp)						\
({									\
	typeof(pcp) __retval;						\
	preempt_disable();						\
	__retval = (typeof(pcp))__percpu_read(raw_cpu_ptr(&(pcp)), 	\
					      sizeof(pcp));		\
	preempt_enable();						\
	__retval;							\
})

#define _percpu_write(pcp, val)						\
do {									\
	preempt_disable();						\
	__percpu_write(raw_cpu_ptr(&(pcp)), (unsigned long)(val), 	\
				sizeof(pcp));				\
	preempt_enable();						\
} while(0)								\

#define _pcp_protect(operation, pcp, val)			\
({								\
	typeof(pcp) __retval;					\
	preempt_disable();					\
	__retval = (typeof(pcp))operation(raw_cpu_ptr(&(pcp)),	\
					  (val), sizeof(pcp));	\
	preempt_enable();					\
	__retval;						\
})

#define _percpu_add(pcp, val) \
	__percpu_add(raw_cpu_ptr(&(pcp)), val, sizeof(pcp))
	_pcp_protect(__percpu_add, pcp, val)

#define _percpu_add_return(pcp, val) (typeof(pcp)) (_percpu_add(pcp, val))
#define _percpu_add_return(pcp, val) _percpu_add(pcp, val)

#define _percpu_and(pcp, val) \
	__percpu_and(raw_cpu_ptr(&(pcp)), val, sizeof(pcp))
	_pcp_protect(__percpu_and, pcp, val)

#define _percpu_or(pcp, val) \
	__percpu_or(raw_cpu_ptr(&(pcp)), val, sizeof(pcp))

#define _percpu_read(pcp) (typeof(pcp))	\
	(__percpu_read(raw_cpu_ptr(&(pcp)), sizeof(pcp)))

#define _percpu_write(pcp, val) \
	__percpu_write(raw_cpu_ptr(&(pcp)), (unsigned long)(val), sizeof(pcp))
	_pcp_protect(__percpu_or, pcp, val)

#define _percpu_xchg(pcp, val) (typeof(pcp)) \
	(__percpu_xchg(raw_cpu_ptr(&(pcp)), (unsigned long)(val), sizeof(pcp)))
	_pcp_protect(__percpu_xchg, pcp, (unsigned long)(val))

#define this_cpu_add_1(pcp, val) _percpu_add(pcp, val)
#define this_cpu_add_2(pcp, val) _percpu_add(pcp, val)
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