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Commit 220ab9bd authored by Ken Wang's avatar Ken Wang Committed by Alex Deucher
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drm/amdgpu: soc15 enable (v3)



Add soc15 support and enable all the IPs for vega10.

v2: squash in xclk fix
v3: disable HDP MGCG

Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarKen Wang <Qingqing.Wang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f83a9991
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+1 −1
Original line number Diff line number Diff line
@@ -34,7 +34,7 @@ amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o kv_smc.o kv_dpm.o \
amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce_v6_0.o si_dpm.o si_smc.o

amdgpu-y += \
	vi.o mxgpu_vi.o nbio_v6_1.o
	vi.o mxgpu_vi.o nbio_v6_1.o soc15.o

# add GMC block
amdgpu-y += \
+3 −0
Original line number Diff line number Diff line
@@ -903,6 +903,9 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,
			case CHIP_POLARIS12:
				strcpy(fw_name, "amdgpu/polaris12_smc.bin");
				break;
			case CHIP_VEGA10:
				strcpy(fw_name, "amdgpu/vega10_smc.bin");
				break;
			default:
				DRM_ERROR("SMC firmware not supported\n");
				return -EINVAL;
+806 −0

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