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Commit 21c88c4b authored by Tony Lijo Jose's avatar Tony Lijo Jose Committed by Gerrit - the friendly Code Review server
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msm: camera: cci: Correct the queue size for cci version 1.2



Correct the queue size for cci version 1.2 as below,

1. Queue 0 size = 64.
2. Queue 1 size = 16.

CRs-Fixed: 2578562
Change-Id: Ifc9407427fe2bf0996c77dc00c5dfe7e5ba22140
Signed-off-by: default avatarTony Lijo Jose <tjose@codeaurora.org>
parent b9ae9bed
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+2 −0
Original line number Diff line number Diff line
@@ -34,6 +34,8 @@
#define V4L2_IDENT_CCI 50005
#define CCI_I2C_QUEUE_0_SIZE 128
#define CCI_I2C_QUEUE_1_SIZE 32
#define CCI_I2C_QUEUE_0_SIZE_V_1_2 64
#define CCI_I2C_QUEUE_1_SIZE_V_1_2 16
#define CYCLES_PER_MICRO_SEC_DEFAULT 4915
#define CCI_MAX_DELAY 1000000

+12 −2
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ int cam_cci_init(struct v4l2_subdev *sd,
	struct cam_axi_vote axi_vote = {0};
	struct cam_hw_soc_info *soc_info = NULL;
	void __iomem *base = NULL;
	uint32_t max_queue_0_size = 0, max_queue_1_size = 0;

	cci_dev = v4l2_get_subdevdata(sd);
	if (!cci_dev || !c_ctrl) {
@@ -116,14 +117,23 @@ int cam_cci_init(struct v4l2_subdev *sd,
		MSM_CCI_WRITE_DATA_PAYLOAD_SIZE_11;
	cci_dev->support_seq_write = 1;

	if (of_device_is_compatible(soc_info->dev->of_node,
						"qcom,cci-v1.2")) {
		max_queue_0_size = CCI_I2C_QUEUE_0_SIZE_V_1_2;
		max_queue_1_size = CCI_I2C_QUEUE_1_SIZE_V_1_2;
	} else {
		max_queue_0_size = CCI_I2C_QUEUE_0_SIZE;
		max_queue_1_size = CCI_I2C_QUEUE_1_SIZE;
	}

	for (i = 0; i < NUM_MASTERS; i++) {
		for (j = 0; j < NUM_QUEUES; j++) {
			if (j == QUEUE_0)
				cci_dev->cci_i2c_queue_info[i][j].max_queue_size
					= CCI_I2C_QUEUE_0_SIZE;
					= max_queue_0_size;
			else
				cci_dev->cci_i2c_queue_info[i][j].max_queue_size
					= CCI_I2C_QUEUE_1_SIZE;
					= max_queue_1_size;

			CAM_DBG(CAM_CCI, "CCI Master[%d] :: Q0 : %d Q1 : %d", i,
			cci_dev->cci_i2c_queue_info[i][j].max_queue_size,