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Commit 21c433a7 authored by Christoph Hellwig's avatar Christoph Hellwig Committed by Bjorn Helgaas
Browse files

IB/hfi1: Use pcie_flr() instead of duplicating it 



Tested-by: default avatarJakub Byczkowski <jakub.byczkowski@intel.com>
Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Acked-by: default avatarDoug Ledford <dledford@redhat.com>
parent 48f52d1a

drivers/infiniband/hw/hfi1/chip.c

+2 −2
Original line number Diff line number Diff line
@@ -13610,14 +13610,14 @@ static void init_chip(struct hfi1_devdata *dd) 
		dd_dev_info(dd, "Resetting CSRs with FLR\n");



		/* do the FLR, the DC reset will remain */

		hfi1_pcie_flr(dd);

		pcie_flr(dd->pcidev);



		/* restore command and BARs */

		restore_pci_variables(dd);



		if (is_ax(dd)) {

			dd_dev_info(dd, "Resetting CSRs with FLR\n");

			hfi1_pcie_flr(dd);

			pcie_flr(dd->pcidev);

			restore_pci_variables(dd);

		}

	} else {

drivers/infiniband/hw/hfi1/hfi.h

+0 −1
Original line number Diff line number Diff line
@@ -1764,7 +1764,6 @@ int hfi1_pcie_init(struct pci_dev *, const struct pci_device_id *); 
void hfi1_pcie_cleanup(struct pci_dev *);

int hfi1_pcie_ddinit(struct hfi1_devdata *, struct pci_dev *);

void hfi1_pcie_ddcleanup(struct hfi1_devdata *);

void hfi1_pcie_flr(struct hfi1_devdata *);

int pcie_speeds(struct hfi1_devdata *);

void request_msix(struct hfi1_devdata *, u32 *, struct hfi1_msix_entry *);

void hfi1_enable_intx(struct pci_dev *);

drivers/infiniband/hw/hfi1/pcie.c

+0 −30
Original line number Diff line number Diff line
@@ -240,36 +240,6 @@ void hfi1_pcie_ddcleanup(struct hfi1_devdata *dd) 
		iounmap(dd->piobase);

}



/*

 * Do a Function Level Reset (FLR) on the device.

 * Based on static function drivers/pci/pci.c:pcie_flr().

 */

void hfi1_pcie_flr(struct hfi1_devdata *dd)

{

	int i;

	u16 status;



	/* no need to check for the capability - we know the device has it */



	/* wait for Transaction Pending bit to clear, at most a few ms */

	for (i = 0; i < 4; i++) {

		if (i)

			msleep((1 << (i - 1)) * 100);



		pcie_capability_read_word(dd->pcidev, PCI_EXP_DEVSTA, &status);

		if (!(status & PCI_EXP_DEVSTA_TRPND))

			goto clear;

	}



	dd_dev_err(dd, "Transaction Pending bit is not clearing, proceeding with reset anyway\n");



clear:

	pcie_capability_set_word(dd->pcidev, PCI_EXP_DEVCTL,

				 PCI_EXP_DEVCTL_BCR_FLR);

	/* PCIe spec requires the function to be back within 100ms */

	msleep(100);

}



static void msix_setup(struct hfi1_devdata *dd, int pos, u32 *msixcnt,

		       struct hfi1_msix_entry *hfi1_msix_entry)

{