Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 20fcaf91 authored by Suraj Jaiswal's avatar Suraj Jaiswal Committed by Gerrit - the friendly Code Review server
Browse files

emac: CRC error for tput run 

This change fix the CRC error seen for
tput run in RX direction due to PTP.

Change-Id: I75762884a2fa4fbb40e196da46718d887b260c62
parent ddf2d81a

drivers/emac-dwc-eqos/DWC_ETH_QOS_drv.c

+0 −4
Original line number Diff line number Diff line
@@ -5177,10 +5177,6 @@ void DWC_ETH_QOS_pps_timer_init(struct ifr_data_struct *req) 


	/* Enable timestamping. This is required to start system time generator.*/

	MAC_TCR_TSENA_UDFWR(0x1);

	MAC_TCR_TSCTRLSSR_UDFWR(0x1);

	MAC_TCR_TSVER2ENA_UDFWR(0x1);

	MAC_TCR_TSIPENA_UDFWR(0x1);

	MAC_TCR_TSENALL_UDFWR(0x1);



	/* Configure MAC Sub-second and Sub-nanosecond increment register based on PTP clock. */

	MAC_SSIR_SSINC_UDFWR(0x4); // Sub-second increment value for 250MHz and 230.4MHz ptp clock

drivers/emac-dwc-eqos/DWC_ETH_QOS_ptp.c

+1 −1
Original line number Diff line number Diff line
@@ -318,7 +318,7 @@ int DWC_ETH_QOS_ptp_init(struct DWC_ETH_QOS_prv_data *pdata) 
	if (pdata->emac_hw_version_type == EMAC_HW_v2_3_1) {

		/*Configuaring PPS0 PPS output frequency to defualt 19.2 Mhz*/

		eth_pps_cfg.ppsout_ch = 0;

		eth_pps_cfg.ptpclk_freq == DWC_ETH_QOS_DEFAULT_PTP_CLOCK;

		eth_pps_cfg.ptpclk_freq = DWC_ETH_QOS_DEFAULT_PTP_CLOCK;

		eth_pps_cfg.ppsout_freq = 19200000;

		eth_pps_cfg.ppsout_start = 1;

		req.ptr = (void*)&eth_pps_cfg;