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Commit 209636b6 authored by Murali Karicheri's avatar Murali Karicheri Committed by Santosh Shilimkar
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ARM: dts: keystone: add support for k2 Edison SoC and EVM



Keystone2 Edison (K2E) is a Quad Cortex A15 based SoC with
1 DSP. It has standard peripherals such as i2c, spi, uart, timer,
pcie, etc similar to k2hk, but without wireless hardwares. This
patch add support for k2 Edison SoC and EVM. This re-uses the common
keystone.dtsi to include common bindings across the various k2
devices.

Signed-off-by: default avatarMurali Karicheri <m-karicheri2@ti.com>
Signed-off-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
parent fc1c72eb
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/*
 * Copyright 2014 Texas Instruments, Inc.
 *
 * Keystone 2 Edison SoC specific device tree
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

clocks {
	mainpllclk: mainpllclk@2310110 {
		#clock-cells = <0>;
		compatible = "ti,keystone,main-pll-clock";
		clocks = <&refclksys>;
		reg = <0x02620350 4>, <0x02310110 4>;
		reg-names = "control", "multiplier";
		fixed-postdiv = <2>;
	};

	papllclk: papllclk@2620358 {
		#clock-cells = <0>;
		compatible = "ti,keystone,pll-clock";
		clocks = <&refclkpass>;
		clock-output-names = "pa-pll-clk";
		reg = <0x02620358 4>;
		reg-names = "control";
	};

	ddr3apllclk: ddr3apllclk@2620360 {
		#clock-cells = <0>;
		compatible = "ti,keystone,pll-clock";
		clocks = <&refclkddr3a>;
		clock-output-names = "ddr-3a-pll-clk";
		reg = <0x02620360 4>;
		reg-names = "control";
	};

	clkusb1: clkusb1 {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk16>;
		clock-output-names = "usb";
		reg = <0x02350004 0xb00>, <0x02350000 0x400>;
		reg-names = "control", "domain";
		domain-id = <0>;
	};

	clkhyperlink0: clkhyperlink0 {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk12>;
		clock-output-names = "hyperlink-0";
		reg = <0x02350030 0xb00>, <0x02350014 0x400>;
		reg-names = "control", "domain";
		domain-id = <5>;
	};

	clkpcie1: clkpcie1 {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk12>;
		clock-output-names = "pcie";
		reg = <0x0235006c 0xb00>, <0x02350000 0x400>;
		reg-names = "control", "domain";
		domain-id = <18>;
	};

	clkxge: clkxge {
		#clock-cells = <0>;
		compatible = "ti,keystone,psc-clock";
		clocks = <&chipclk13>;
		clock-output-names = "xge";
		reg = <0x023500c8 0xb00>, <0x02350074 0x400>;
		reg-names = "control", "domain";
		domain-id = <29>;
	};
};
+60 −0
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/*
 * Copyright 2013-2014 Texas Instruments, Inc.
 *
 * Keystone 2 Edison EVM device tree
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "keystone.dtsi"
#include "k2e.dtsi"

/ {
	compatible =  "ti,k2e-evm";
	model = "Texas Instruments Keystone 2 Edison EVM";

	soc {

		clocks {
			refclksys: refclksys {
				#clock-cells = <0>;
				compatible = "fixed-clock";
				clock-frequency = <100000000>;
				clock-output-names = "refclk-sys";
			};

			refclkpass: refclkpass {
				#clock-cells = <0>;
				compatible = "fixed-clock";
				clock-frequency = <100000000>;
				clock-output-names = "refclk-pass";
			};

			refclkddr3a: refclkddr3a {
				#clock-cells = <0>;
				compatible = "fixed-clock";
				clock-frequency = <100000000>;
				clock-output-names = "refclk-ddr3a";
			};
		};
	};
};

&usb_phy {
	status = "okay";
};

&usb {
	status = "okay";
};

&usb1_phy {
	status = "okay";
};

&usb1 {
	status = "okay";
};
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/*
 * Copyright 2013-2014 Texas Instruments, Inc.
 *
 * Keystone 2 Edison soc device tree
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		interrupt-parent = <&gic>;

		cpu@0 {
			compatible = "arm,cortex-a15";
			device_type = "cpu";
			reg = <0>;
		};

		cpu@1 {
			compatible = "arm,cortex-a15";
			device_type = "cpu";
			reg = <1>;
		};

		cpu@2 {
			compatible = "arm,cortex-a15";
			device_type = "cpu";
			reg = <2>;
		};

		cpu@3 {
			compatible = "arm,cortex-a15";
			device_type = "cpu";
			reg = <3>;
		};
	};

	soc {
		/include/ "k2e-clocks.dtsi"

		usb: usb@2680000 {
			interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
			dwc3@2690000 {
				interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
			};
		};

		usb1_phy: usb_phy@2620750 {
			compatible = "ti,keystone-usbphy";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x2620750 24>;
			status = "disabled";
		};

		usb1: usb@25000000 {
			compatible = "ti,keystone-dwc3";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x25000000 0x10000>;
			clocks = <&clkusb1>;
			clock-names = "usb";
			interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>;
			ranges;
			status = "disabled";

			dwc3@25010000 {
				compatible = "synopsys,dwc3";
				reg = <0x25010000 0x70000>;
				interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>;
				usb-phy = <&usb1_phy>, <&usb1_phy>;
			};
		};
	};
};