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Commit 2078da96 authored by Boris Brezillon's avatar Boris Brezillon Committed by Nicolas Ferre
Browse files

ARM: at91/dt: move at91sam9rl SoC to the new slow/main clock models 



Move at91sam9rl SoC to the new main/slow clock model.

Signed-off-by: default avatarBoris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: default avatarAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
parent b6170645

arch/arm/boot/dts/at91sam9rl.dtsi

+39 −7
Original line number Diff line number Diff line
@@ -48,6 +48,18 @@ 
		reg = <0x20000000 0x04000000>;

	};



	slow_xtal: slow_xtal {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <0>;

	};



	main_xtal: main_xtal {

		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <0>;

	};



	ahb {

		compatible = "simple-bus";

		#address-cells = <1>;
@@ -548,17 +560,11 @@ 
				#size-cells = <0>;

				#interrupt-cells = <1>;



				clk32k: slck {

					compatible = "fixed-clock";

					#clock-cells = <0>;

					clock-frequency = <32768>;

				};



				main: mainck {

					compatible = "atmel,at91rm9200-clk-main";

					#clock-cells = <0>;

					interrupts-extended = <&pmc AT91_PMC_MOSCS>;

					clocks = <&clk32k>;

					clocks = <&main_xtal>;

				};



				plla: pllack {
@@ -769,6 +775,32 @@ 
				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;

				status = "disabled";

			};



			sckc@fffffd50 {

				compatible = "atmel,at91sam9x5-sckc";

				reg = <0xfffffd50 0x4>;



				slow_osc: slow_osc {

					compatible = "atmel,at91sam9x5-clk-slow-osc";

					#clock-cells = <0>;

					atmel,startup-time-usec = <1200000>;

					clocks = <&slow_xtal>;

				};



				slow_rc_osc: slow_rc_osc {

					compatible = "atmel,at91sam9x5-clk-slow-rc-osc";

					#clock-cells = <0>;

					atmel,startup-time-usec = <75>;

					clock-frequency = <32768>;

					clock-accuracy = <50000000>;

				};



				clk32k: slck {

					compatible = "atmel,at91sam9x5-clk-slow";

					#clock-cells = <0>;

					clocks = <&slow_rc_osc &slow_osc>;

				};

			};

		};

	};