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Commit 20590de2 authored by Rocky Hao's avatar Rocky Hao Committed by Heiko Stuebner
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arm64: dts: rockchip: add tsadc node for rk3328 SoC 



add tsadc needed main information for rk3328 SoC.
50000Hz is the max clock rate supported by tsadc module.

Signed-off-by: default avatarRocky Hao <rocky.hao@rock-chips.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent d80ef50a

arch/arm64/boot/dts/rockchip/rk3328.dtsi

+20 −0
Original line number Diff line number Diff line
@@ -400,6 +400,26 @@ 
		interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;

	};



	tsadc: tsadc@ff250000 {

		compatible = "rockchip,rk3328-tsadc";

		reg = <0x0 0xff250000 0x0 0x100>;

		interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;

		assigned-clocks = <&cru SCLK_TSADC>;

		assigned-clock-rates = <50000>;

		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;

		clock-names = "tsadc", "apb_pclk";

		pinctrl-names = "init", "default", "sleep";

		pinctrl-0 = <&otp_gpio>;

		pinctrl-1 = <&otp_out>;

		pinctrl-2 = <&otp_gpio>;

		resets = <&cru SRST_TSADC>;

		reset-names = "tsadc-apb";

		rockchip,grf = <&grf>;

		rockchip,hw-tshut-temp = <100000>;

		#thermal-sensor-cells = <1>;

		status = "disabled";

	};



	saradc: adc@ff280000 {

		compatible = "rockchip,rk3328-saradc", "rockchip,rk3399-saradc";

		reg = <0x0 0xff280000 0x0 0x100>;