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Commit 1fd41a65 authored by Rafał Miłecki's avatar Rafał Miłecki Committed by John W. Linville
Browse files

bcma: change delays to follow timers-howto guide 



Signed-off-by: default avatarRafał Miłecki <zajec5@gmail.com>
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent f1b98bb3

drivers/bcma/core.c

+1 −1
Original line number Diff line number Diff line
@@ -65,7 +65,7 @@ void bcma_core_set_clockmode(struct bcma_device *core, 
	switch (clkmode) {

	case BCMA_CLKMODE_FAST:

		bcma_set32(core, BCMA_CLKCTLST, BCMA_CLKCTLST_FORCEHT);

		udelay(64);

		usleep_range(64, 300);

		for (i = 0; i < 1500; i++) {

			if (bcma_read32(core, BCMA_CLKCTLST) &

			    BCMA_CLKCTLST_HAVEHT) {

drivers/bcma/driver_chipcommon_pmu.c

+4 −1
Original line number Diff line number Diff line
@@ -76,7 +76,10 @@ static void bcma_pmu_resources_init(struct bcma_drv_cc *cc) 
	if (max_msk)

		bcma_cc_write32(cc, BCMA_CC_PMU_MAXRES_MSK, max_msk);



	/* Add some delay; allow resources to come up and settle. */

	/*

	 * Add some delay; allow resources to come up and settle.

	 * Delay is required for SoC (early init).

	 */

	mdelay(2);

}

drivers/bcma/driver_pci.c

+3 −3
Original line number Diff line number Diff line
@@ -51,7 +51,7 @@ static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy) 
		v = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_CONTROL);

		if (v & BCMA_CORE_PCI_MDIOCTL_ACCESS_DONE)

			break;

		msleep(1);

		usleep_range(1000, 2000);

	}

}
@@ -92,7 +92,7 @@ static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address) 
			ret = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_DATA);

			break;

		}

		msleep(1);

		usleep_range(1000, 2000);

	}

	pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);

	return ret;
@@ -132,7 +132,7 @@ static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device, 
		v = pcicore_read32(pc, BCMA_CORE_PCI_MDIO_CONTROL);

		if (v & BCMA_CORE_PCI_MDIOCTL_ACCESS_DONE)

			break;

		msleep(1);

		usleep_range(1000, 2000);

	}

	pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0);

}

drivers/bcma/driver_pci_host.c

+4 −4
Original line number Diff line number Diff line
@@ -425,9 +425,9 @@ void __devinit bcma_core_pci_hostmode_init(struct bcma_drv_pci *pc) 
	pc_host->io_resource.flags = IORESOURCE_IO | IORESOURCE_PCI_FIXED;



	/* Reset RC */

	udelay(3000);

	usleep_range(3000, 5000);

	pcicore_write32(pc, BCMA_CORE_PCI_CTL, BCMA_CORE_PCI_CTL_RST_OE);

	udelay(1000);

	usleep_range(1000, 2000);

	pcicore_write32(pc, BCMA_CORE_PCI_CTL, BCMA_CORE_PCI_CTL_RST |

			BCMA_CORE_PCI_CTL_RST_OE);
@@ -481,7 +481,7 @@ void __devinit bcma_core_pci_hostmode_init(struct bcma_drv_pci *pc) 
	 * before issuing configuration requests to PCI Express

	 * devices.

	 */

	udelay(100000);

	msleep(100);



	bcma_core_pci_enable_crs(pc);
@@ -501,7 +501,7 @@ void __devinit bcma_core_pci_hostmode_init(struct bcma_drv_pci *pc) 
	set_io_port_base(pc_host->pci_controller.io_map_base);

	/* Give some time to the PCI controller to configure itself with the new

	 * values. Not waiting at this point causes crashes of the machine. */

	mdelay(10);

	usleep_range(10000, 15000);

	register_pci_controller(&pc_host->pci_controller);

	return;

}