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Commit 1f3a1c54 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'thunderx-phy' 



David Daney says:

====================
net/phy: Improvements to Cavium Thunder MDIO code.

Changes from v1:

 - In 1/3 Add back check for non-OF objects in bgx_init_of_phy().  It
   is probably not necessary, but better safe than sorry...

The firmware on many Cavium Thunder systems configures the MDIO bus
hardware to be probed as a PCI device.  In order to use the MDIO bus
drivers in this configuration, we must add PCI probing to the driver.

There are two parts to this set of three patches:

 1) Cleanup the PHY probing code in thunder_bgx.c to handle the case
    where there is no PHY attached to a port, as well as being more
    robust in the face of driver loading order by use of
    -EPROBE_DEFER.

 2) Split mdio-octeon.c into two drivers, one with platform probing,
 and the other with PCI probing.  Common code is shared between the
 two.

Tested on several different Thunder and OCTEON systems, also compile
tested on x86_64.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 0df83e7a 379d7ac7

Documentation/devicetree/bindings/net/cavium-mdio.txt

+59 −2
Original line number Diff line number Diff line 
* System Management Interface (SMI) / MDIO



Properties:

- compatible: "cavium,octeon-3860-mdio"

- compatible: One of:



  Compatibility with all cn3XXX, cn5XXX and cn6XXX SOCs.

   "cavium,octeon-3860-mdio": Compatibility with all cn3XXX, cn5XXX

                       and cn6XXX SOCs.



   "cavium,thunder-8890-mdio": Compatibility with all cn8XXX SOCs.



- reg: The base address of the MDIO bus controller register bank.
@@ -25,3 +28,57 @@ Example: 
			reg = <0>;

		};

	};





* System Management Interface (SMI) / MDIO Nexus



  Several mdio buses may be gathered as children of a single PCI

  device, this PCI device is the nexus of the buses.



Properties:



- compatible: "cavium,thunder-8890-mdio-nexus";



- reg: The PCI device and function numbers of the nexus device.



- #address-cells: Must be <2>.



- #size-cells: Must be <2>.



- ranges: As needed for mapping of the MDIO bus device registers.



- assigned-addresses: As needed for mapping of the MDIO bus device registers.



Example:



        mdio-nexus@1,3 {

                compatible = "cavium,thunder-8890-mdio-nexus";

                #address-cells = <2>;

                #size-cells = <2>;

                reg = <0x0b00 0 0 0 0>; /* DEVFN = 0x0b (1:3) */

                assigned-addresses = <0x03000000 0x87e0 0x05000000 0x0 0x800000>;

                ranges = <0x87e0 0x05000000 0x03000000 0x87e0 0x05000000 0x0 0x800000>;



                mdio0@87e0,05003800 {

                        compatible = "cavium,thunder-8890-mdio";

                        #address-cells = <1>;

                        #size-cells = <0>;

                        reg = <0x87e0 0x05003800 0x0 0x30>;



                        ethernet-phy@0 {

                                ...

                                reg = <0>;

                        };

                };

                mdio0@87e0,05003880 {

                        compatible = "cavium,thunder-8890-mdio";

                        #address-cells = <1>;

                        #size-cells = <0>;

                        reg = <0x87e0 0x05003880 0x0 0x30>;



                        ethernet-phy@0 {

                                ...

                                reg = <0>;

                        };

                };

        };

drivers/net/ethernet/cavium/thunder/thunder_bgx.c

+18 −11
Original line number Diff line number Diff line
@@ -978,27 +978,37 @@ static int bgx_init_of_phy(struct bgx *bgx) 
	const char *mac;



	device_for_each_child_node(&bgx->pdev->dev, fwn) {

		struct phy_device *pd;

		struct device_node *phy_np;

		struct device_node *node = to_of_node(fwn);



		/* If it is not an OF node we cannot handle it yet, so

		 * exit the loop.

		/* Should always be an OF node.  But if it is not, we

		 * cannot handle it, so exit the loop.

		 */

		if (!node)

			break;



		phy_np = of_parse_phandle(node, "phy-handle", 0);

		if (!phy_np)

			continue;



		bgx->lmac[lmac].phydev = of_phy_find_device(phy_np);



		mac = of_get_mac_address(node);

		if (mac)

			ether_addr_copy(bgx->lmac[lmac].mac, mac);



		SET_NETDEV_DEV(&bgx->lmac[lmac].netdev, &bgx->pdev->dev);

		bgx->lmac[lmac].lmacid = lmac;



		phy_np = of_parse_phandle(node, "phy-handle", 0);

		/* If there is no phy or defective firmware presents

		 * this cortina phy, for which there is no driver

		 * support, ignore it.

		 */

		if (phy_np &&

		    !of_device_is_compatible(phy_np, "cortina,cs4223-slice")) {

			/* Wait until the phy drivers are available */

			pd = of_phy_find_device(phy_np);

			if (!pd)

				return -EPROBE_DEFER;

			bgx->lmac[lmac].phydev = pd;

		}



		lmac++;

		if (lmac == MAX_LMAC_PER_BGX) {

			of_node_put(node);
@@ -1032,9 +1042,6 @@ static int bgx_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 
	struct bgx *bgx = NULL;

	u8 lmac;



	/* Load octeon mdio driver */

	octeon_mdiobus_force_mod_depencency();



	bgx = devm_kzalloc(dev, sizeof(*bgx), GFP_KERNEL);

	if (!bgx)

		return -ENOMEM;

drivers/net/phy/Kconfig

+18 −4
Original line number Diff line number Diff line
@@ -183,15 +183,29 @@ config MDIO_GPIO 
	  To compile this driver as a module, choose M here: the module

	  will be called mdio-gpio.



config MDIO_CAVIUM

	tristate



config MDIO_OCTEON

	tristate "Support for MDIO buses on Octeon and ThunderX SOCs"

	tristate "Support for MDIO buses on Octeon and some ThunderX SOCs"

	depends on 64BIT

	depends on HAS_IOMEM

	select MDIO_CAVIUM

	help



	  This module provides a driver for the Octeon and ThunderX MDIO

	  busses. It is required by the Octeon and ThunderX ethernet device

	  drivers.

	  buses. It is required by the Octeon and ThunderX ethernet device

	  drivers on some systems.



config MDIO_THUNDER

	tristate "Support for MDIO buses on on ThunderX SOCs"

	depends on 64BIT

	depends on PCI

	select MDIO_CAVIUM

	help

	  This driver supports the MDIO interfaces found on Cavium

	  ThunderX SoCs when the MDIO bus device appears on as a PCI

	  device.





config MDIO_SUN4I

	tristate "Allwinner sun4i MDIO interface support"

drivers/net/phy/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -31,6 +31,8 @@ obj-$(CONFIG_DP83867_PHY) += dp83867.o 
obj-$(CONFIG_STE10XP)		+= ste10Xp.o

obj-$(CONFIG_MICREL_PHY)	+= micrel.o

obj-$(CONFIG_MDIO_OCTEON)	+= mdio-octeon.o

obj-$(CONFIG_MDIO_THUNDER)	+= mdio-thunder.o

obj-$(CONFIG_MDIO_CAVIUM)	+= mdio-cavium.o

obj-$(CONFIG_MICREL_KS8995MA)	+= spi_ks8995.o

obj-$(CONFIG_AT803X_PHY)	+= at803x.o

obj-$(CONFIG_AMD_PHY)		+= amd.o

drivers/net/phy/mdio-cavium.c

0 → 100644
+149 −0
Original line number Diff line number Diff line 
/*

 * This file is subject to the terms and conditions of the GNU General Public

 * License.  See the file "COPYING" in the main directory of this archive

 * for more details.

 *

 * Copyright (C) 2009-2016 Cavium, Inc.

 */



#include <linux/delay.h>

#include <linux/module.h>

#include <linux/phy.h>

#include <linux/io.h>



#include "mdio-cavium.h"



static void cavium_mdiobus_set_mode(struct cavium_mdiobus *p,

				    enum cavium_mdiobus_mode m)

{

	union cvmx_smix_clk smi_clk;



	if (m == p->mode)

		return;



	smi_clk.u64 = oct_mdio_readq(p->register_base + SMI_CLK);

	smi_clk.s.mode = (m == C45) ? 1 : 0;

	smi_clk.s.preamble = 1;

	oct_mdio_writeq(smi_clk.u64, p->register_base + SMI_CLK);

	p->mode = m;

}



static int cavium_mdiobus_c45_addr(struct cavium_mdiobus *p,

				   int phy_id, int regnum)

{

	union cvmx_smix_cmd smi_cmd;

	union cvmx_smix_wr_dat smi_wr;

	int timeout = 1000;



	cavium_mdiobus_set_mode(p, C45);



	smi_wr.u64 = 0;

	smi_wr.s.dat = regnum & 0xffff;

	oct_mdio_writeq(smi_wr.u64, p->register_base + SMI_WR_DAT);



	regnum = (regnum >> 16) & 0x1f;



	smi_cmd.u64 = 0;

	smi_cmd.s.phy_op = 0; /* MDIO_CLAUSE_45_ADDRESS */

	smi_cmd.s.phy_adr = phy_id;

	smi_cmd.s.reg_adr = regnum;

	oct_mdio_writeq(smi_cmd.u64, p->register_base + SMI_CMD);



	do {

		/* Wait 1000 clocks so we don't saturate the RSL bus

		 * doing reads.

		 */

		__delay(1000);

		smi_wr.u64 = oct_mdio_readq(p->register_base + SMI_WR_DAT);

	} while (smi_wr.s.pending && --timeout);



	if (timeout <= 0)

		return -EIO;

	return 0;

}



int cavium_mdiobus_read(struct mii_bus *bus, int phy_id, int regnum)

{

	struct cavium_mdiobus *p = bus->priv;

	union cvmx_smix_cmd smi_cmd;

	union cvmx_smix_rd_dat smi_rd;

	unsigned int op = 1; /* MDIO_CLAUSE_22_READ */

	int timeout = 1000;



	if (regnum & MII_ADDR_C45) {

		int r = cavium_mdiobus_c45_addr(p, phy_id, regnum);



		if (r < 0)

			return r;



		regnum = (regnum >> 16) & 0x1f;

		op = 3; /* MDIO_CLAUSE_45_READ */

	} else {

		cavium_mdiobus_set_mode(p, C22);

	}



	smi_cmd.u64 = 0;

	smi_cmd.s.phy_op = op;

	smi_cmd.s.phy_adr = phy_id;

	smi_cmd.s.reg_adr = regnum;

	oct_mdio_writeq(smi_cmd.u64, p->register_base + SMI_CMD);



	do {

		/* Wait 1000 clocks so we don't saturate the RSL bus

		 * doing reads.

		 */

		__delay(1000);

		smi_rd.u64 = oct_mdio_readq(p->register_base + SMI_RD_DAT);

	} while (smi_rd.s.pending && --timeout);



	if (smi_rd.s.val)

		return smi_rd.s.dat;

	else

		return -EIO;

}

EXPORT_SYMBOL(cavium_mdiobus_read);



int cavium_mdiobus_write(struct mii_bus *bus, int phy_id, int regnum, u16 val)

{

	struct cavium_mdiobus *p = bus->priv;

	union cvmx_smix_cmd smi_cmd;

	union cvmx_smix_wr_dat smi_wr;

	unsigned int op = 0; /* MDIO_CLAUSE_22_WRITE */

	int timeout = 1000;



	if (regnum & MII_ADDR_C45) {

		int r = cavium_mdiobus_c45_addr(p, phy_id, regnum);



		if (r < 0)

			return r;



		regnum = (regnum >> 16) & 0x1f;

		op = 1; /* MDIO_CLAUSE_45_WRITE */

	} else {

		cavium_mdiobus_set_mode(p, C22);

	}



	smi_wr.u64 = 0;

	smi_wr.s.dat = val;

	oct_mdio_writeq(smi_wr.u64, p->register_base + SMI_WR_DAT);



	smi_cmd.u64 = 0;

	smi_cmd.s.phy_op = op;

	smi_cmd.s.phy_adr = phy_id;

	smi_cmd.s.reg_adr = regnum;

	oct_mdio_writeq(smi_cmd.u64, p->register_base + SMI_CMD);



	do {

		/* Wait 1000 clocks so we don't saturate the RSL bus

		 * doing reads.

		 */

		__delay(1000);

		smi_wr.u64 = oct_mdio_readq(p->register_base + SMI_WR_DAT);

	} while (smi_wr.s.pending && --timeout);



	if (timeout <= 0)

		return -EIO;



	return 0;

}

EXPORT_SYMBOL(cavium_mdiobus_write);