Loading asoc/codecs/bolero/rx-macro.c +21 −1 Original line number Diff line number Diff line Loading @@ -1665,7 +1665,9 @@ static int rx_macro_config_compander(struct snd_soc_component *component, int interp_n, int event) { int comp = 0; u16 comp_ctl0_reg = 0, rx_path_cfg0_reg = 0; u16 comp_ctl0_reg = 0, rx_path_cfg0_reg = 0, rx_path_cfg3_reg = 0; u16 rx0_path_ctl_reg = 0; u8 pcm_rate = 0, val = 0; /* AUX does not have compander */ if (interp_n == INTERP_AUX) Loading @@ -1682,6 +1684,20 @@ static int rx_macro_config_compander(struct snd_soc_component *component, (comp * RX_MACRO_COMP_OFFSET); rx_path_cfg0_reg = BOLERO_CDC_RX_RX0_RX_PATH_CFG0 + (comp * RX_MACRO_RX_PATH_OFFSET); rx_path_cfg3_reg = BOLERO_CDC_RX_RX0_RX_PATH_CFG3 + (comp * RX_MACRO_RX_PATH_OFFSET); rx0_path_ctl_reg = BOLERO_CDC_RX_RX0_RX_PATH_CTL + (comp * RX_MACRO_RX_PATH_OFFSET); pcm_rate = (snd_soc_component_read32(component, rx0_path_ctl_reg) & 0x0F); if (pcm_rate < 0x06) val = 0x03; else if (pcm_rate < 0x08) val = 0x01; else if (pcm_rate < 0x0B) val = 0x02; else val = 0x00; if (SND_SOC_DAPM_EVENT_ON(event)) { /* Enable Compander Clock */ Loading @@ -1693,6 +1709,8 @@ static int rx_macro_config_compander(struct snd_soc_component *component, 0x02, 0x00); snd_soc_component_update_bits(component, rx_path_cfg0_reg, 0x02, 0x02); snd_soc_component_update_bits(component, rx_path_cfg3_reg, 0x03, val); } if (SND_SOC_DAPM_EVENT_OFF(event)) { Loading @@ -1704,6 +1722,8 @@ static int rx_macro_config_compander(struct snd_soc_component *component, 0x01, 0x00); snd_soc_component_update_bits(component, comp_ctl0_reg, 0x04, 0x00); snd_soc_component_update_bits(component, rx_path_cfg3_reg, 0x03, 0x03); } return 0; Loading Loading
asoc/codecs/bolero/rx-macro.c +21 −1 Original line number Diff line number Diff line Loading @@ -1665,7 +1665,9 @@ static int rx_macro_config_compander(struct snd_soc_component *component, int interp_n, int event) { int comp = 0; u16 comp_ctl0_reg = 0, rx_path_cfg0_reg = 0; u16 comp_ctl0_reg = 0, rx_path_cfg0_reg = 0, rx_path_cfg3_reg = 0; u16 rx0_path_ctl_reg = 0; u8 pcm_rate = 0, val = 0; /* AUX does not have compander */ if (interp_n == INTERP_AUX) Loading @@ -1682,6 +1684,20 @@ static int rx_macro_config_compander(struct snd_soc_component *component, (comp * RX_MACRO_COMP_OFFSET); rx_path_cfg0_reg = BOLERO_CDC_RX_RX0_RX_PATH_CFG0 + (comp * RX_MACRO_RX_PATH_OFFSET); rx_path_cfg3_reg = BOLERO_CDC_RX_RX0_RX_PATH_CFG3 + (comp * RX_MACRO_RX_PATH_OFFSET); rx0_path_ctl_reg = BOLERO_CDC_RX_RX0_RX_PATH_CTL + (comp * RX_MACRO_RX_PATH_OFFSET); pcm_rate = (snd_soc_component_read32(component, rx0_path_ctl_reg) & 0x0F); if (pcm_rate < 0x06) val = 0x03; else if (pcm_rate < 0x08) val = 0x01; else if (pcm_rate < 0x0B) val = 0x02; else val = 0x00; if (SND_SOC_DAPM_EVENT_ON(event)) { /* Enable Compander Clock */ Loading @@ -1693,6 +1709,8 @@ static int rx_macro_config_compander(struct snd_soc_component *component, 0x02, 0x00); snd_soc_component_update_bits(component, rx_path_cfg0_reg, 0x02, 0x02); snd_soc_component_update_bits(component, rx_path_cfg3_reg, 0x03, val); } if (SND_SOC_DAPM_EVENT_OFF(event)) { Loading @@ -1704,6 +1722,8 @@ static int rx_macro_config_compander(struct snd_soc_component *component, 0x01, 0x00); snd_soc_component_update_bits(component, comp_ctl0_reg, 0x04, 0x00); snd_soc_component_update_bits(component, rx_path_cfg3_reg, 0x03, 0x03); } return 0; Loading