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Commit 1d899fd6 authored by Sonic Zhang's avatar Sonic Zhang Committed by Steven Miao
Browse files

blackfin: Add STMMAC platform data to enable dwmac1000 driver on BF60x. 



- Enable GMAC
- Set propler DMA PBL
- Disable DMA store and forward mode
- Select PTP input clock from MII
clock.

Signed-off-by: default avatarSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: default avatarSteven Miao <realmz6@gmail.com>
parent e5786092

arch/blackfin/mach-bf609/boards/ezkit.c

+16 −0
Original line number Diff line number Diff line
@@ -104,6 +104,7 @@ static struct platform_device bfin_rotary_device = { 


#if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)

#include <linux/stmmac.h>

#include <linux/phy.h>



static unsigned short pins[] = P_RMII0;
@@ -111,11 +112,26 @@ static struct stmmac_mdio_bus_data phy_private_data = { 
	.phy_mask = 1,

};



static struct stmmac_dma_cfg eth_dma_cfg = {

	.pbl	= 2,

};



int stmmac_ptp_clk_init(struct platform_device *pdev)

{

	bfin_write32(PADS0_EMAC_PTP_CLKSEL, 0);

	return 0;

}



static struct plat_stmmacenet_data eth_private_data = {

	.has_gmac = 1,

	.bus_id   = 0,

	.enh_desc = 1,

	.phy_addr = 1,

	.mdio_bus_data = &phy_private_data,

	.dma_cfg  = &eth_dma_cfg,

	.force_thresh_dma_mode = 1,

	.interface = PHY_INTERFACE_MODE_RMII,

	.init = stmmac_ptp_clk_init,

};



static struct platform_device bfin_eth_device = {

arch/blackfin/mach-bf609/include/mach/defBF60x_base.h

+10 −0
Original line number Diff line number Diff line
@@ -839,6 +839,16 @@ 
#define PORTG_LOCK                  0xFFC03344         /* PORTG Port x GPIO Lock Register */

#define PORTG_REVID                 0xFFC0337C         /* PORTG Port x GPIO Revision ID */



/* ==================================================

        Pads Controller Registers

   ================================================== */



/* =========================

        PADS0

   ========================= */

#define PADS0_EMAC_PTP_CLKSEL	    0xFFC03404         /* PADS0 Clock Selection for EMAC and PTP */

#define PADS0_TWI_VSEL		    0xFFC03408         /* PADS0 TWI Voltage Selection */

#define PADS0_PORTS_HYST	    0xFFC03440         /* PADS0 Hysteresis Enable Register */



/* =========================

        PINT Registers