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Commit 1d0ff673 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "cnss2: Add debug dump for Wlan FW PBL and SBL for HST"

parents 9fdd8ec8 a1fe6414

drivers/net/wireless/cnss2/pci.c

+88 −15
Original line number Diff line number Diff line
@@ -1623,6 +1623,17 @@ static void cnss_pci_dump_misc_reg(struct cnss_pci_data *pci_priv) 
			       pci_priv->wlaon_reg_size, "wlaon");

}



static void cnss_pci_dump_mhi_reg(struct cnss_pci_data *pci_priv)

{

	if (in_interrupt() || irqs_disabled())

		return;



	if (cnss_pci_check_link_status(pci_priv))

		return;



	mhi_debug_reg_dump(pci_priv->mhi_ctrl);

}



static void cnss_pci_dump_shadow_reg(struct cnss_pci_data *pci_priv)

{

	int i, j = 0, array_size = SHADOW_REG_COUNT + SHADOW_REG_INTER_COUNT;
@@ -1681,6 +1692,57 @@ static void cnss_pci_collect_dump(struct cnss_pci_data *pci_priv) 
}

#endif



/**

 * cnss_pci_dump_qca6390_sram_mem - Dump WLAN FW bootloader debug log

 * @pci_priv: PCI device private data structure of cnss platform driver

 *

 * Dump Primary and secondary bootloader debug log data. For SBL check the

 * log struct address and size for validity.

 *

 * Supported only on QCA6390

 *

 * Return: None

 */

static void cnss_pci_dump_qca6390_sram_mem(struct cnss_pci_data *pci_priv)

{

	int i;

	u32 mem_addr, val, pbl_stage;

	u32 pbl_wlan_boot_cfg, pbl_bootstrap_status;

	struct cnss_plat_data *plat_priv = pci_priv->plat_priv;



	if (plat_priv->device_id != QCA6390_DEVICE_ID)

		return;



	if (cnss_pci_check_link_status(pci_priv))

		return;



	cnss_pci_reg_read(pci_priv, QCA6390_TCSR_PBL_LOGGING_REG, &pbl_stage);

	cnss_pci_reg_read(pci_priv, QCA6390_PBL_WLAN_BOOT_CFG,

			  &pbl_wlan_boot_cfg);

	cnss_pci_reg_read(pci_priv, QCA6390_PBL_BOOTSTRAP_STATUS,

			  &pbl_bootstrap_status);

	cnss_pr_dbg("TCSR_PBL_LOGGING: 0x%08x", pbl_stage);

	cnss_pr_dbg("PBL_WLAN_BOOT_CFG: 0x%08x PBL_BOOTSTRAP_STATUS: 0x%08x",

		    pbl_wlan_boot_cfg, pbl_bootstrap_status);



	cnss_pr_dbg("Dumping PBL log data");

	/* cnss_pci_reg_read provides 32bit register values */

	for (i = 0; i < QCA6390_DEBUG_PBL_LOG_SRAM_MAX_SIZE; i += sizeof(val)) {

		mem_addr = QCA6390_DEBUG_PBL_LOG_SRAM_START + i;

		if (cnss_pci_reg_read(pci_priv, mem_addr, &val))

			break;

		cnss_pr_dbg("SRAM[0x%x] = 0x%x\n", mem_addr, val);

	}



	cnss_pr_dbg("Dumping SBL log data");

	for (i = 0; i < QCA6390_DEBUG_SBL_LOG_SRAM_MAX_SIZE; i += sizeof(val)) {

		mem_addr = QCA6390_V2_SBL_DATA_START + i;

		if (cnss_pci_reg_read(pci_priv, mem_addr, &val))

			break;

		cnss_pr_dbg("SRAM[0x%x] = 0x%x\n", mem_addr, val);

	}

}



/**

 * cnss_pci_dump_bl_sram_mem - Dump WLAN FW bootloader debug log

 * @pci_priv: PCI device private data structure of cnss platform driver
@@ -1699,8 +1761,12 @@ static void cnss_pci_dump_bl_sram_mem(struct cnss_pci_data *pci_priv) 
	u32 pbl_wlan_boot_cfg, pbl_bootstrap_status;

	struct cnss_plat_data *plat_priv = pci_priv->plat_priv;



	if (plat_priv->device_id != QCA6490_DEVICE_ID)

	if (plat_priv->device_id == QCA6390_DEVICE_ID) {

		cnss_pci_dump_qca6390_sram_mem(pci_priv);

		return;

	} else if (plat_priv->device_id != QCA6490_DEVICE_ID) {

		return;

	}



	if (cnss_pci_check_link_status(pci_priv))

		return;
@@ -1714,8 +1780,7 @@ static void cnss_pci_dump_bl_sram_mem(struct cnss_pci_data *pci_priv) 
			  &pbl_wlan_boot_cfg);

	cnss_pci_reg_read(pci_priv, QCA6490_PBL_BOOTSTRAP_STATUS,

			  &pbl_bootstrap_status);



	cnss_pr_dbg("TCSR_PBL_LOGGING: 0x%08x PCIE_BHI_ERRDBG: 0x%08x 0x%08x",

	cnss_pr_dbg("TCSR_PBL_LOGGING: 0x%08x PCIE_BHI_ERRDBG: Start: 0x%08x Size:0x%08x",

		    pbl_stage, sbl_log_start, sbl_log_size);

	cnss_pr_dbg("PBL_WLAN_BOOT_CFG: 0x%08x PBL_BOOTSTRAP_STATUS: 0x%08x",

		    pbl_wlan_boot_cfg, pbl_bootstrap_status);
@@ -1729,28 +1794,30 @@ static void cnss_pci_dump_bl_sram_mem(struct cnss_pci_data *pci_priv) 
		cnss_pr_dbg("SRAM[0x%x] = 0x%x\n", mem_addr, val);

	}



	sbl_log_size = (sbl_log_size > QCA6490_DEBUG_SBL_LOG_SRAM_MAX_SIZE ?

			QCA6490_DEBUG_SBL_LOG_SRAM_MAX_SIZE : sbl_log_size);

	if (plat_priv->device_version.major_version == FW_V2_NUMBER) {

		if (sbl_log_start > QCA6490_V2_SBL_DATA_START &&

		    (sbl_log_start + sbl_log_size) < QCA6490_V2_SBL_DATA_END)

			goto dump_sbl_log;

		if (sbl_log_start < QCA6490_V2_SBL_DATA_START ||

		    sbl_log_start > QCA6490_V2_SBL_DATA_END ||

		    (sbl_log_start + sbl_log_size) > QCA6490_V2_SBL_DATA_END)

			goto out;

	} else {

		if (sbl_log_start > QCA6490_V1_SBL_DATA_START &&

		    (sbl_log_start + sbl_log_size) < QCA6490_V1_SBL_DATA_END)

			goto dump_sbl_log;

		if (sbl_log_start < QCA6490_V1_SBL_DATA_START ||

		    sbl_log_start > QCA6490_V1_SBL_DATA_END ||

		    (sbl_log_start + sbl_log_size) > QCA6490_V1_SBL_DATA_END)

			goto out;

	}

	cnss_pr_err("Invalid SBL log data");

	return;



dump_sbl_log:

	cnss_pr_dbg("Dumping SBL log data");

	sbl_log_size = (sbl_log_size > QCA6490_DEBUG_SBL_LOG_SRAM_MAX_SIZE ?

			QCA6490_DEBUG_SBL_LOG_SRAM_MAX_SIZE : sbl_log_size);

	for (i = 0; i < sbl_log_size; i += sizeof(val)) {

		mem_addr = sbl_log_start + i;

		if (cnss_pci_reg_read(pci_priv, mem_addr, &val))

			break;

		cnss_pr_dbg("SRAM[0x%x] = 0x%x\n", mem_addr, val);

	}

	return;

out:

	cnss_pr_err("Invalid SBL log data");

}



static int cnss_qca6174_powerup(struct cnss_pci_data *pci_priv)
@@ -3920,7 +3987,6 @@ int cnss_pci_force_fw_assert_hdlr(struct cnss_pci_data *pci_priv) 
	cnss_auto_resume(&pci_priv->pci_dev->dev);

	cnss_pci_dump_misc_reg(pci_priv);

	cnss_pci_dump_shadow_reg(pci_priv);

	cnss_pci_dump_bl_sram_mem(pci_priv);



	ret = cnss_pci_set_mhi_state(pci_priv, CNSS_MHI_TRIGGER_RDDM);

	if (ret) {
@@ -4390,6 +4456,13 @@ static void cnss_mhi_notify_status(struct mhi_controller *mhi_ctrl, void *priv, 
		plat_priv->use_fw_path_with_prefix = false;

		cnss_pci_update_fw_name(pci_priv);

		return;

	case MHI_CB_BOOTUP_TIMEOUT:

		if (plat_priv->device_id == QCA6490_DEVICE_ID ||

		    plat_priv->device_id == QCA6390_DEVICE_ID) {

			cnss_pci_dump_bl_sram_mem(pci_priv);

			cnss_pci_dump_mhi_reg(pci_priv);

		}

		break;

	default:

		cnss_pr_err("Unsupported MHI status cb reason: %d\n", reason);

		return;

drivers/net/wireless/cnss2/reg.h

+11 −0
Original line number Diff line number Diff line
@@ -279,4 +279,15 @@ 
#define QCA6490_PCIE_BHI_ERRDBG3_REG 0x01E0E23C

#define QCA6490_PBL_WLAN_BOOT_CFG 0x01E22B34

#define QCA6490_PBL_BOOTSTRAP_STATUS 0x01910008



#define QCA6390_DEBUG_PBL_LOG_SRAM_START 0x01403D58

#define QCA6390_DEBUG_PBL_LOG_SRAM_MAX_SIZE 80

#define QCA6390_V2_SBL_DATA_START 0x016c8580

#define QCA6390_V2_SBL_DATA_END (0x016c8580 + 0x00011000)

#define QCA6390_DEBUG_SBL_LOG_SRAM_MAX_SIZE 44

#define QCA6390_TCSR_PBL_LOGGING_REG 0x01B000F8

#define QCA6390_PCIE_BHI_ERRDBG2_REG 0x01E0E238

#define QCA6390_PCIE_BHI_ERRDBG3_REG 0x01E0E23C

#define QCA6390_PBL_WLAN_BOOT_CFG    0x01E22B34

#define QCA6390_PBL_BOOTSTRAP_STATUS 0x01910008

#endif