Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1c2256df authored by Imre Deak's avatar Imre Deak Committed by Daniel Vetter
Browse files

drm/i915: add a default always-on power well 



So far we distinguished platforms without a dynamic power well with
the HAS_POWER_WELL macro and for such platforms we didn't call any power
domain functions. Instead of doing this check we can add an always-on
power well for these platforms and call the power domain functions
unconditionally. For always-on power wells we only increase/decrease
their refcounts, otherwise they are nop.

This makes high level driver code more readable and as a bonus provides
some idea of the current power domains state for all platforms (once
the relevant debugfs entry is added).

v3: rename intel_power_wells to i9xx_always_on_power_well (Paulo)

Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarPaulo Zanoni <paulo.zanoni@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent f7243ac9

drivers/gpu/drm/i915/i915_dma.c

+7 −11
Original line number Diff line number Diff line
@@ -1639,7 +1639,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) 
			goto out_gem_unload;

	}



	if (HAS_POWER_WELL(dev))

	intel_power_domains_init(dev);



	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
@@ -1667,7 +1666,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) 
	return 0;



out_power_well:

	if (HAS_POWER_WELL(dev))

	intel_power_domains_remove(dev);

	drm_vblank_cleanup(dev);

out_gem_unload:
@@ -1706,13 +1704,11 @@ int i915_driver_unload(struct drm_device *dev) 


	intel_gpu_ips_teardown();



	if (HAS_POWER_WELL(dev)) {

	/* The i915.ko module is still not prepared to be loaded when

	 * the power well is not enabled, so just enable it in case

	 * we're going to unload/reload. */

	intel_display_set_init_power(dev, true);

	intel_power_domains_remove(dev);

	}



	i915_teardown_sysfs(dev);

drivers/gpu/drm/i915/i915_drv.h

+0 −1
Original line number Diff line number Diff line
@@ -1834,7 +1834,6 @@ struct drm_i915_file_private { 
#define HAS_IPS(dev)		(IS_ULT(dev) || IS_BROADWELL(dev))



#define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)

#define HAS_POWER_WELL(dev)	(IS_HASWELL(dev) || IS_BROADWELL(dev))

#define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)

#define HAS_PSR(dev)		(IS_HASWELL(dev) || IS_BROADWELL(dev))

drivers/gpu/drm/i915/intel_pm.c

+9 −19
Original line number Diff line number Diff line
@@ -5644,9 +5644,6 @@ bool intel_display_power_enabled(struct drm_device *dev, 
	bool is_enabled;

	int i;



	if (!HAS_POWER_WELL(dev))

		return true;



	power_domains = &dev_priv->power_domains;



	is_enabled = true;
@@ -5754,9 +5751,6 @@ void intel_display_power_get(struct drm_device *dev, 
	struct i915_power_well *power_well;

	int i;



	if (!HAS_POWER_WELL(dev))

		return;



	power_domains = &dev_priv->power_domains;



	mutex_lock(&power_domains->lock);
@@ -5773,9 +5767,6 @@ void intel_display_power_put(struct drm_device *dev, 
	struct i915_power_well *power_well;

	int i;



	if (!HAS_POWER_WELL(dev))

		return;



	power_domains = &dev_priv->power_domains;



	mutex_lock(&power_domains->lock);
@@ -5814,6 +5805,14 @@ void i915_release_power_well(void) 
}

EXPORT_SYMBOL_GPL(i915_release_power_well);



static struct i915_power_well i9xx_always_on_power_well[] = {

	{

		.name = "always-on",

		.always_on = 1,

		.domains = POWER_DOMAIN_MASK,

	},

};



static struct i915_power_well hsw_power_wells[] = {

	{

		.name = "always-on",
@@ -5852,9 +5851,6 @@ int intel_power_domains_init(struct drm_device *dev) 
	struct drm_i915_private *dev_priv = dev->dev_private;

	struct i915_power_domains *power_domains = &dev_priv->power_domains;



	if (!HAS_POWER_WELL(dev))

		return 0;



	mutex_init(&power_domains->lock);



	/*
@@ -5868,7 +5864,7 @@ int intel_power_domains_init(struct drm_device *dev) 
		set_power_wells(power_domains, bdw_power_wells);

		hsw_pwr = power_domains;

	} else {

		WARN_ON(1);

		set_power_wells(power_domains, i9xx_always_on_power_well);

	}



	return 0;
@@ -5886,9 +5882,6 @@ static void intel_power_domains_resume(struct drm_device *dev) 
	struct i915_power_well *power_well;

	int i;



	if (!HAS_POWER_WELL(dev))

		return;



	mutex_lock(&power_domains->lock);

	for_each_power_well(i, power_well, POWER_DOMAIN_MASK, power_domains) {

		if (power_well->set)
@@ -5907,9 +5900,6 @@ void intel_power_domains_init_hw(struct drm_device *dev) 
{

	struct drm_i915_private *dev_priv = dev->dev_private;



	if (!HAS_POWER_WELL(dev))

		return;



	/* For now, we need the power well to be always enabled. */

	intel_display_set_init_power(dev, true);

	intel_power_domains_resume(dev);