Merge 0a5953ff179a24a8a1fdfd1af455e7cdb3a008e2 on remote branch (1b97696e) · Commits · e / devices / android_kernel_fairphone_FP4

bindings/display/msm/mdss-dsi-panel.txt

+1 −0

Original line number	Diff line number	Diff line
		@@ -427,6 +427,7 @@ Optional properties:
		- qcom,mdss-dsi-tx-eot-append: Boolean used to enable appending end of transmission packets.
		- qcom,ulps-enabled: Boolean to enable support for Ultra Low Power State (ULPS) mode.
		- qcom,suspend-ulps-enabled: Boolean to enable support for ULPS mode for panels during suspend state.
		- qcom,platform-reset-gpio-always-on: Boolean to keep display reset gpio on during suspend.
		- qcom,panel-roi-alignment: Specifies the panel ROI alignment restrictions on its
		left, top, width, height alignments and minimum width and
		height values. This property is specified per timing node to support

bindings/display/msm/sde.txt

+38 −46

Original line number	Diff line number	Diff line
		@@ -383,48 +383,51 @@ Optional properties:
		priority for concurrent writeback clients.
		- qcom,sde-vbif-qos-lutdma-remap: This array is used to program vbif qos remapper register
		priority for lutdma client.
		- qcom,sde-danger-lut: Array of 5 cell property, with a format of
		- qcom,sde-qos-refresh-rates: A u32 array, indicating the different refresh rates for
		danger, safe and creq luts on sspp and wb. All luts will be
		multidimensional values when multiple refresh rate qos is present.
		- qcom,sde-danger-lut: A u32 array of 5 cell property, with a format of
		<linear, tile, nrt, cwb, tile-qseed>,
		indicating the danger luts on sspp.
		- qcom,sde-safe-lut-linear: Array of 2 cell property, with a format of
		indicating the danger luts on sspp and wb.
		- qcom,sde-safe-lut-linear: A u32 array of 2 cell property, with a format of
		<fill level, lut> in ascending fill level
		indicating the safe luts for linear format on sspp.
		Zero fill level on the last entry identifies the default lut.
		- qcom,sde-safe-lut-macrotile: Array of 2 cell property, with a format of
		- qcom,sde-safe-lut-macrotile: A u32 array of 2 cell property, with a format of
		<fill level, lut> in ascending fill level
		indicating the safe luts for macrotile format on sspp.
		Zero fill level on the last entry identifies the default lut.
		- qcom,sde-safe-lut-macrotile-qseed: Array of 2 cell property, with a format of
		- qcom,sde-safe-lut-macrotile-qseed: A u32 array of 2 cell property, with a format of
		<fill level, lut> in ascending fill level
		indicating the safe luts for macrotile format
		with qseed3 on sspp.
		Zero fill level on the last entry identifies the default lut.
		- qcom,sde-safe-lut-nrt: Array of 2 cell property, with a format of
		- qcom,sde-safe-lut-nrt: A u32 array of 2 cell property, with a format of
		<fill level, lut> in ascending fill level
		indicating the safe luts for nrt (e.g wfd) on sspp.
		Zero fill level on the last entry identifies the default lut.
		- qcom,sde-safe-lut-cwb: Array of 2 cell property, with a format of
		- qcom,sde-safe-lut-cwb: A u32 array of 2 cell property, with a format of
		<fill level, lut> in ascending fill level
		indicating the safe luts for cwb on sspp.
		Zero fill level on the last entry identifies the default lut.
		- qcom,sde-qos-lut-linear: Array of 3 cell property, with a format of
		- qcom,sde-qos-lut-linear: A u64 array of 3 cell property, with a format of
		<fill level, lut hi, lut lo> in ascending fill level
		indicating the qos luts for linear format on sspp.
		Zero fill level on the last entry identifies the default lut.
		- qcom,sde-qos-lut-macrotile: Array of 3 cell property, with a format of
		- qcom,sde-qos-lut-macrotile: A u64 array of 3 cell property, with a format of
		<fill level, lut hi, lut lo> in ascending fill level
		indicating the qos luts for macrotile format on sspp.
		Zero fill level on the last entry identifies the default lut.
		- qcom,sde-qos-lut-macrotile-qseed: Array of 3 cell property, with a format of
		- qcom,sde-qos-lut-macrotile-qseed: A u64 array of 3 cell property, with a format of
		<fill level, lut hi, lut lo> in ascending fill level
		indicating the qos luts for macrotile format
		with qseed3 enabled on sspp.
		Zero fill level on the last entry identifies the default lut.
		- qcom,sde-qos-lut-nrt: Array of 3 cell property, with a format of
		- qcom,sde-qos-lut-nrt: A u64 array of 3 cell property, with a format of
		<fill level, lut hi, lut lo> in ascending fill level
		indicating the qos luts for nrt (e.g wfd) on sspp.
		Zero fill level on the last entry identifies the default lut.
		- qcom,sde-qos-lut-cwb: Array of 3 cell property, with a format of
		- qcom,sde-qos-lut-cwb: A u64 array of 3 cell property, with a format of
		<fill level, lut hi, lut lo> in ascending fill level
		indicating the qos luts for cwb on sspp.
		Zero fill level on the last entry identifies the default lut.
		@@ -679,40 +682,29 @@ Example:
		qcom,sde-wb-id = <2>;
		qcom,sde-wb-clk-ctrl = <0x2bc 16>;

		qcom,sde-danger-lut = <0x0000000f 0x0000ffff 0x00000000
		0x00000000 0x0000ffff>;
		qcom,sde-safe-lut-linear = <0 0xfff8>;
		qcom,sde-safe-lut-macrotile = <0 0xf000>;
		qcom,sde-safe-lut-macrotile-qseed = <0 0xf000>;
		qcom,sde-safe-lut-nrt = <0 0xffff>;
		qcom,sde-safe-lut-cwb = <0 0xffff>;

		qcom,sde-qos-lut-linear =
		<4 0x00000000 0x00000357>,
		<5 0x00000000 0x00003357>,
		<6 0x00000000 0x00023357>,
		<7 0x00000000 0x00223357>,
		<8 0x00000000 0x02223357>,
		<9 0x00000000 0x22223357>,
		<10 0x00000002 0x22223357>,
		<11 0x00000022 0x22223357>,
		<12 0x00000222 0x22223357>,
		<13 0x00002222 0x22223357>,
		<14 0x00012222 0x22223357>,
		<0 0x00112222 0x22223357>;
		qcom,sde-qos-lut-macrotile =
		<10 0x00000003 0x44556677>,
		<11 0x00000033 0x44556677>,
		<12 0x00000233 0x44556677>,
		<13 0x00002233 0x44556677>,
		<14 0x00012233 0x44556677>,
		<0 0x00112233 0x44556677>;
		qcom,sde-qos-lut-macrotile-qseed =
		<0 0x00112233 0x66777777>;
		qcom,sde-qos-lut-nrt =
		qcom,sde-danger-lut = <0x0000ffff 0x0000ffff
		0x00000000 0x00000000 0x0000ffff>, <0x0003ffff
		0x0003ffff 0x00000000 0x00000000 0x0003ffff>;


		qcom,sde-safe-lut-linear = <0 0xff00>, <0 0xfe00>;
		qcom,sde-safe-lut-macrotile = <0 0xff00>, <0 0xfe00>;
		qcom,sde-safe-lut-macrotile-qseed = <0 0xff00>, <0 0xfe00>;
		qcom,sde-safe-lut-nrt = <0 0xffff>, <0 0xffff>;
		qcom,sde-safe-lut-cwb = <0 0x3ff>, <0x3ff>;


		qcom,sde-qos-lut-linear = <0 0x00112233 0x44556677>,
		<0 0x00112234 0x45566777>;
		qcom,sde-qos-lut-macrotile = <0 0x00112233 0x44556677>,
		<0 0x00112234 0x45566777>;
		qcom,sde-qos-lut-macrotile-qseed = <0 0x00112233 0x66777777>,
		<0 0x00112236 0x67777777>;
		qcom,sde-qos-lut-nrt = <0 0x00000000 0x00000000>,
		<0 0x00000000 0x00000000>;
		qcom,sde-qos-lut-cwb =
		<0 0x75300000 0x00000000>;
		qcom,sde-qos-lut-cwb = <0 0x66666541 0x00000000>,
		<0 0x66666541 0x00000000>;
		qcom,sde-qos-refresh-rates = <60 120>;

		qcom,sde-cdp-setting = <1 1>, <1 0>;

bindings/media/video/msm-fd.txt

0 → 100644

+99 −0

Original line number	Diff line number	Diff line
		* Qualcomm Technologies, Inc. MSM FD

		Face detection hardware block.
		The Face Detection Hardware Block will offload processing
		on the host and also reduce power consumption.
		Supports:
		Front and back camera face detection concurrently.
		Sizes: QVGA, VGA, WQVGA, WVGA at 20 pix minimum face size.

		Required properties:

		- compatible:
		- "qcom,face-detection"
		- reg: offset and length of the register set for the device.
		- reg-names: should specify relevant names to each reg property defined.
		- "fd_core" - FD CORE hardware register set.
		- "fd_misc" - FD MISC hardware register set.
		- "fd_vbif" - FD VBIF hardware register set.
		- interrupts: should contain the fd interrupts. From fd cores with
		revisions 0x10010000 and higher, power collapse sequence is required.
		Face detection misc irq is needed to perform power collapse.
		- interrupt-names: should specify relevant names to each interrupts
		property defined.
		- vdd-supply: phandle to GDSC regulator controlling face detection hw.
		- clocks: list of entries each of which contains:
		- phandle to the clock controller.
		- macro containing clock's name in hardware.
		- clock-names: should specify relevant names to each clocks
		property defined.

		Optional properties:

		- clock-rates: should specify clock rates in Hz to each clocks
		property defined.
		If we want to have different operating clock frequencies we can define
		rate levels. They should be defined in incremental order.
		- qcom,bus-bandwidth-vectors: Specifies instant and average bus bandwidth
		vectors per clock rate.
		Each of entries contains:
		- ab. Average bus bandwidth (Bps).
		- ib. Instantaneous bus bandwidth (Bps).
		- mmagic-vdd-supply: phandle to GDSC regulator controlling mmagic.
		- camss-vdd-supply: phandle to GDSC regulator controlling camss.
		- qcom,fd-core-reg-settings: relative address offsets and value pairs for
		FD CORE registers and bit mask.
		Format: <reg_addr_offset reg_value reg_mask>
		- qcom,fd-misc-reg-settings: relative address offsets and value pairs for
		FD MISC registers and bit mask.
		Format: <reg_addr_offset reg_value reg_mask>
		- qcom,fd-vbif-reg-settings: relative address offsets and value pairs for
		FD VBIF registers and bit mask.
		Format: <reg_addr_offset reg_value reg_mask>

		Example:

		qcom,fd@fd878000 {
		compatible = "qcom,face-detection";
		reg = <0xfd878000 0x800>,
		<0xfd87c000 0x800>,
		<0xfd860000 0x1000>;
		reg-names = "fd_core", "fd_misc", "fd_vbif";
		interrupts = <0 316 0>;
		interrupt-names = "fd";
		mmagic-vdd-supply = <&gdsc_mmagic_camss>;
		camss-vdd-supply = <&gdsc_camss_top>;
		vdd-supply = <&gdsc_fd>;
		qcom,vdd-names = "mmagic-vdd", "camss-vdd", "vdd";
		clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>,
		<&clock_gcc clk_mmssnoc_axi_clk>,
		<&clock_mmss clk_mmagic_camss_axi_clk>,
		<&clock_mmss clk_camss_top_ahb_clk>,
		<&clock_mmss clk_fd_core_clk_src>,
		<&clock_mmss clk_fd_core_clk>,
		<&clock_mmss clk_fd_core_uar_clk>,
		<&clock_mmss clk_fd_ahb_clk>,
		<&clock_mmss clk_smmu_cpp_axi_clk>,
		<&clock_mmss clk_camss_ahb_clk>,
		<&clock_mmss clk_camss_cpp_axi_clk>,
		<&clock_mmss clk_camss_cpp_vbif_ahb_clk>,
		<&clock_mmss clk_smmu_cpp_ahb_clk>;
		clock-names = "mmss_mmagic_ahb_clk", "mmssnoc_axi_clk" ,
		"mmagic_camss_axi_clk", "camss_top_ahb_clk",
		"fd_core_clk_src", "fd_core_clk",
		"fd_core_uar_clk", "fd_ahb_clk",
		"smmu_cpp_axi_clk", "camss_ahb_clk",
		"camss_cpp_axi_clk", "cpp_vbif_ahb_clk",
		"smmu_cpp_ahb_clk";
		clock-rates = <0 0 0 0 400000000 400000000 400000000 80000000 0 0 0 0 0>;
		qcom,bus-bandwidth-vectors = <13000000 13000000>,
		<45000000 45000000>,
		<90000000 90000000>;
		qcom,fd-vbif-reg-settings = <0x20 0x10000000 0x30000000>,
		<0x24 0x10000000 0x30000000>,
		<0x28 0x10000000 0x30000000>,
		<0x2c 0x10000000 0x30000000>;
		qcom,fd-misc-reg-settings = <0x20 0x2 0x3>,
		<0x24 0x2 0x3>;
		qcom,fd-core-reg-settings = <0x8 0x20 0xffffffff>;
		};

bindings/media/video/msm-jpeg.txt

0 → 100644

+139 −0

Original line number	Diff line number	Diff line
		* Qualcomm Technologies, Inc. MSM JPEG

		Required properties:
		- cell-index: jpeg hardware core index
		- compatible :
		- "qcom,jpeg"
		- "qcom,jpeg_dma"
		- reg : offset and length of the register set of jpeg device and vbif device
		for the jpeg operating in compatible mode.
		- reg-names : should specify relevant names to each reg property defined.
		- interrupts : should contain the jpeg interrupt.
		- interrupt-names : should specify relevant names to each interrupts
		property defined.
		- clock-names : names of clocks required for the device.
		- clocks : clocks required for the device.
		- qcom, clock-rates: rates of the required clocks.
		- vdd-supply: phandle to GDSC regulator controlling JPEG core.
		- mmagic-vdd-supply: phandle to GDSC regulator controlling mmagic.
		- camss-vdd-supply: phandle to GDSC regulator controlling camss.

		Optional properties:
		- qcom,vbif-reg-settings: relative address offsets and value pairs for VBIF registers.
		- qcom,qos-reg-settings: relative address offsets and value pairs for QoS registers.
		- qcom,prefetch-reg-settings: relative address offsets and value pairs for
		MMU prefetch registers.

		Example:

		qcom,jpeg@a1c000 {
		cell-index = <0>;
		compatible = "qcom,jpeg";
		reg = <0xa1c000 0x4000>,
		<0xa60000 0x3000>;
		reg-names = "jpeg";
		interrupts = <0 316 0>;
		interrupt-names = "jpeg";
		mmagic-vdd-supply = <&gdsc_mmagic_camss>;
		camss-vdd-supply = <&gdsc_camss_top>;
		vdd-supply = <&gdsc_jpeg>;
		qcom,vdd-names = "mmagic-vdd", "camss-vdd", "vdd";
		clock-names = "core_clk", "iface_clk", "bus_clk0",
		"camss_top_ahb_clk", "camss_ahb_clk", "smmu_jpeg_axi_clk",
		"mmss_mmagic_ahb_clk", "mmssnoc_axi_clk",
		"mmagic_camss_axi_clk";
		clocks = <&clock_mmss clk_camss_jpeg0_clk>,
		<&clock_mmss clk_camss_jpeg_ahb_clk>,
		<&clock_mmss clk_camss_jpeg_axi_clk>,
		<&clock_mmss clk_camss_top_ahb_clk>,
		<&clock_mmss clk_camss_ahb_clk>,
		<&clock_mmss clk_smmu_jpeg_axi_clk>,
		<&clock_mmss clk_mmss_mmagic_ahb_clk>,
		<&clock_gcc clk_mmssnoc_axi_clk>,
		<&clock_mmss clk_mmagic_camss_axi_clk>;
		qcom,clock-rates = <320000000 0 0 0 0 0 0 0 0>;
		qcom,vbif-reg-settings = <0x4 0x1>,
		<0xb0 0x00100010>,
		<0xc0 0x10001000>;
		qcom,qos-reg-settings = <0x28 0x00000008>;
		qcom,prefetch-reg-settings = <0x30c 0x1111>,
		<0x318 0x31>,
		<0x324 0x31>,
		<0x330 0x31>,
		<0x33c 0x0>;
		status = "ok";
		};

		qcom,jpeg@a24000 {
		cell-index = <2>;
		compatible = "qcom,jpeg";
		reg = <0xa24000 0x4000>,
		<0xa60000 0x3000>;
		reg-names = "jpeg";
		interrupts = <0 318 0>;
		interrupt-names = "jpeg";
		mmagic-vdd-supply = <&gdsc_mmagic_camss>;
		camss-vdd-supply = <&gdsc_camss_top>;
		vdd-supply = <&gdsc_jpeg>;
		qcom,vdd-names = "mmagic-vdd", "camss-vdd", "vdd";
		clock-names = "core_clk", "iface_clk", "bus_clk0",
		"camss_top_ahb_clk", "camss_ahb_clk", "smmu_jpeg_axi_clk",
		"mmss_mmagic_ahb_clk", "mmssnoc_axi_clk",
		"mmagic_camss_axi_clk";
		clocks = <&clock_mmss clk_camss_jpeg2_clk>,
		<&clock_mmss clk_camss_jpeg_ahb_clk>,
		<&clock_mmss clk_camss_jpeg_axi_clk>,
		<&clock_mmss clk_camss_top_ahb_clk>,
		<&clock_mmss clk_camss_ahb_clk>,
		<&clock_mmss clk_smmu_jpeg_axi_clk>,
		<&clock_mmss clk_mmss_mmagic_ahb_clk>,
		<&clock_gcc clk_mmssnoc_axi_clk>,
		<&clock_mmss clk_mmagic_camss_axi_clk>;
		qcom,clock-rates = <266670000 0 0 0 0 0 0 0 0>;
		qcom,vbif-reg-settings = <0x4 0x1>,
		<0xb0 0x00100010>,
		<0xc0 0x10001000>;
		qcom,qos-reg-settings = <0x28 0x00000008>;
		qcom,prefetch-reg-settings = <0x30c 0x1111>,
		<0x318 0x0>,
		<0x324 0x31>,
		<0x330 0x31>,
		<0x33c 0x31>;
		status = "ok";
		};

		qcom,jpeg@aa0000 {
		cell-index = <3>;
		compatible = "qcom,jpeg_dma";
		reg = <0xaa0000 0x4000>,
		<0xa60000 0x3000>;
		reg-names = "jpeg";
		interrupts = <0 304 0>;
		interrupt-names = "jpeg";
		mmagic-vdd-supply = <&gdsc_mmagic_camss>;
		camss-vdd-supply = <&gdsc_camss_top>;
		vdd-supply = <&gdsc_jpeg>;
		qcom,vdd-names = "mmagic-vdd", "camss-vdd", "vdd";
		clock-names = "core_clk", "iface_clk", "bus_clk0",
		"camss_top_ahb_clk", "camss_ahb_clk", "smmu_jpeg_axi_clk",
		"mmss_mmagic_ahb_clk", "mmssnoc_axi_clk",
		"mmagic_camss_axi_clk";
		clocks = <&clock_mmss clk_camss_jpeg_dma_clk>,
		<&clock_mmss clk_camss_jpeg_ahb_clk>,
		<&clock_mmss clk_camss_jpeg_axi_clk>,
		<&clock_mmss clk_camss_top_ahb_clk>,
		<&clock_mmss clk_camss_ahb_clk>,
		<&clock_mmss clk_smmu_jpeg_axi_clk>,
		<&clock_mmss clk_mmss_mmagic_ahb_clk>,
		<&clock_gcc clk_mmssnoc_axi_clk>,
		<&clock_mmss clk_mmagic_camss_axi_clk>;
		qcom,clock-rates = <266670000 0 0 0 0 0 0 0 0>;
		qcom,vbif-reg-settings = <0x4 0x1>,
		<0xb0 0x00100010>,
		<0xc0 0x10001000>;
		qcom,qos-reg-settings = <0x28 0x00000008>;
		qcom,prefetch-reg-settings = <0x18c 0x11>,
		<0x1a0 0x31>,
		<0x1b0 0x31>;
		status = "ok";
		};

bindings/media/video/msm-vfe.txt

0 → 100644

+208 −0

Original line number	Diff line number	Diff line
		* Qualcomm Technologies, Inc. MSM VFE

		Required properties for parent node:
		- compatible :
		- "qcom,vfe"
		- #address-cells : Number of address related values in the reg field
		- #size-cells : Number of size related values in the reg field
		- ranges: How the register offsets for child translate to parent.

		Required properties for child node:
		- cell-index: vfe hardware core index
		- compatible :
		- "qcom,vfe32"
		- "qcom,vfe40"
		- "qcom,vfe44"
		- "qcom,vfe46"
		- "qcom,vfe47"
		- "qcom,vfe48"
		- reg : offset and length of the register set for the device
		for the vfe operating in compatible mode. For parent node, add union of
		all registers for both vfe.
		- reg-names : should specify relevant names to each reg property defined.
		Only needed for child node.
		- "vfe" - Required.
		- "vfe_vbif" - Optional for "vfe32". Required for "vfe40".
		- "vfe_fuse" - Optional.
		- interrupts : should contain the vfe interrupt.
		- interrupt-names : should specify relevant names to each interrupts
		property defined.
		- "vfe" - Required.
		- vdd-supply: phandle to GDSC regulator controlling VFE core.
		- qos-entries: number of QoS registers to program
		- qos-regs: relative address offsets of QoS registers
		- qos-settings: QoS values to be written to QoS registers
		- vbif-entries - number of VBIF registers to program (optional)
		- vbif-regs: relative address offsets of VBIF registers (optional)
		- vbif-settings: VBIF values to be written to VBIF registers (optional)
		- ds-entries: number danger/safe registers to program (optional)
		- ds-regs: relative address offsets of danger/safe registers (optional)
		- ds-settings: danger/safe values to be written to registers (optional)
		NOTE: For all qos, vbif, ds* parameters, same SoC can have different
		hardware versions with different entries/registers/settings. They can be
		specified by adding version to the string e.g. qos-v2-settings. Also
		different SoC can have same hardware version and still different QOS, VBIF,
		and DS parameters. In this case they are exported if separate SoC version
		specific dts files.
		- max-svs-clk: svs rate of the VFE clock in Hertz.
		- max-nominal-clk: nominal rate of the VFE clock in Hertz.
		- max-turbo-clk: turbo/high rate of the VFE clock in Hertz.

		Example:

		vfe0: qcom,vfe0@fda10000 {
		cell-index = <0>;
		compatible = "qcom,vfe44";
		reg = <0xfda10000 0x1000>,
		<0xfda40000 0x200>,
		<0x7801a4 0x8>;
		reg-names = "vfe", "vfe_vbif", "vfe_fuse";
		interrupts = <0 57 0>;
		interrupt-names = "vfe";
		vdd-supply = <&gdsc_vfe>;
		qos-entries = <8>;
		qos-regs = <0x2c4 0x2c8 0x2cc 0x2d0 0x2d4 0x2d8
		0x2dc 0x2e0>;
		qos-settings = <0xaaaaaaaa 0xaaaaaaaa 0xaaaaaaaa
		0xaaaaaaaa 0xaaaaaaaa 0xaaaaaaaa
		0xaaaaaaaa 0x0002aaaa>;
		qos-v2-settings = <0xaaa9aaa9 0xaaa9aaa9 0xaaa9aaa9
		0xaaa9aaa9 0xaaa9aaa9 0xaaa9aaa9
		0xaaa9aaa9 0x0001aaa9>;
		qos-v3-settings = <0xaaa9aaa9 0xaaa9aaa9 0xaaa9aaa9
		0xaaa9aaa9 0xaaa9aaa9 0xaaa9aaa9
		0xaaa9aaa9 0x0001aaa9>;
		vbif-entries = <17>;
		vbif-regs = <0x4 0xb0 0xb4 0xb8 0xc0 0xc4 0xc8 0xd0
		0xd4 0xd8 0xdc 0xf0 0x178 0x17c 0x124 0x160
		0x164>;
		vbif-settings = <0x1 0x01010101 0x01010101 0x10010110
		0x10101010 0x10101010 0x10101010 0x00001010
		0x00001010 0x00000707 0x00000707 0x00000030
		0x00000fff 0x0fff0fff 0x00000001 0x22222222
		0x00002222>;
		vbif-v2-entries = <16>;
		vbif-v2-regs = <0x4 0xb0 0xb4 0xb8 0xc0 0xc4 0xc8 0xd0
		0xd4 0xd8 0xf0 0x178 0x17c 0x124 0x160
		0x164>;
		vbif-v2-settings = <0x1 0x10101010 0x10101010 0x10101010
		0x10101010 0x10101010 0x10101010 0x00000010
		0x00000010 0x00000707 0x00000010 0x00000fff
		0x0fff0fff 0x00000003 0x22222222 0x00002222>;
		ds-entries = <17>;
		ds-regs = <0x988 0x98c 0x990 0x994 0x998
		0x99c 0x9a0 0x9a4 0x9a8 0x9ac 0x9b0
		0x9b4 0x9b8 0x9bc 0x9c0 0x9c4 0x9c8>;
		ds-settings = <0x44441111 0x44441111 0x44441111
		0x44441111 0x44441111 0x44441111
		0x44441111 0x44441111 0x44441111
		0x44441111 0x44441111 0x44441111
		0x44441111 0x44441111 0x44441111
		0x44441111 0x00000103>;
		max-clk-svs = <300000000>;
		max-clk-nominal = <465000000>;
		max-clk-turbo = <600000000>;
		};

		vfe1: qcom,vfe1@fda14000 {
		cell-index = <1>;
		compatible = "qcom,vfe44";
		reg = <0xfda14000 0x1000>,
		<0xfda40000 0x200>,
		<0x7801a4 0x8>;
		reg-names = "vfe", "vfe_vbif", "vfe_fuse";
		interrupts = <0 58 0>;
		interrupt-names = "vfe";
		vdd-supply = <&gdsc_vfe>;
		qos-entries = <8>;
		qos-regs = <0x2c4 0x2c8 0x2cc 0x2d0 0x2d4 0x2d8
		0x2dc 0x2e0>;
		qos-settings = <0xaaaaaaaa 0xaaaaaaaa 0xaaaaaaaa
		0xaaaaaaaa 0xaaaaaaaa 0xaaaaaaaa
		0xaaaaaaaa 0x0002aaaa>;
		qos-v2-settings = <0xaaa9aaa9 0xaaa9aaa9 0xaaa9aaa9
		0xaaa9aaa9 0xaaa9aaa9 0xaaa9aaa9
		0xaaa9aaa9 0x0001aaa9>;
		qos-v3-settings = <0xaaa9aaa9 0xaaa9aaa9 0xaaa9aaa9
		0xaaa9aaa9 0xaaa9aaa9 0xaaa9aaa9
		0xaaa9aaa9 0x0001aaa9>;
		vbif-entries = <17>;
		vbif-regs = <0x4 0xb0 0xb4 0xb8 0xc0 0xc4 0xc8 0xd0
		0xd4 0xd8 0xdc 0xf0 0x178 0x17c 0x124 0x160
		0x164>;
		vbif-settings = <0x1 0x01010101 0x01010101 0x10010110
		0x10101010 0x10101010 0x10101010 0x00001010
		0x00001010 0x00000707 0x00000707 0x00000030
		0x00000fff 0x0fff0fff 0x00000001 0x22222222
		0x00002222>;
		vbif-v2-entries = <16>;
		vbif-v2-regs = <0x4 0xb0 0xb4 0xb8 0xc0 0xc4 0xc8 0xd0
		0xd4 0xd8 0xf0 0x178 0x17c 0x124 0x160
		0x164>;
		vbif-v2-settings = <0x1 0x10101010 0x10101010 0x10101010
		0x10101010 0x10101010 0x10101010 0x00000010
		0x00000010 0x00000707 0x00000010 0x00000fff
		0x0fff0fff 0x00000003 0x22222222 0x00002222>;
		ds-entries = <17>;
		ds-regs = <0x988 0x98c 0x990 0x994 0x998
		0x99c 0x9a0 0x9a4 0x9a8 0x9ac 0x9b0
		0x9b4 0x9b8 0x9bc 0x9c0 0x9c4 0x9c8>;
		ds-settings = <0x44441111 0x44441111 0x44441111
		0x44441111 0x44441111 0x44441111
		0x44441111 0x44441111 0x44441111
		0x44441111 0x44441111 0x44441111
		0x44441111 0x44441111 0x44441111
		0x44441111 0x00000103>;
		max-clk-svs = <300000000>;
		max-clk-nominal = <465000000>;
		max-clk-turbo = <600000000>;
		};

		qcom,vfe {
		compatible = "qcom,vfe";
		num_child = <2>;
		};

		In version specific file one needs to move only entries that differ between
		SoC versions with same VFE HW version:

		&vfe0 {
		qos-entries = <8>;
		qos-regs = <0x378 0x37C 0x380 0x384 0x388 0x38C
		0x390 0x394>;
		qos-settings = <0xAAA9AAA9
		0xAAA9AAA9
		0xAAA9AAA9
		0xAAA9AAA9
		0xAAA9AAA9
		0xAAA9AAA9
		0xAAA9AAA9
		0x0001AAA9>;
		vbif-entries = <1>;
		vbif-regs = <0x124>;
		vbif-settings = <0x3>;
		ds-entries = <17>;
		ds-regs = <0xBD8 0xBDC 0xBE0 0xBE4 0xBE8
		0xBEC 0xBF0 0xBF4 0xBF8 0xBFC 0xC00
		0xC04 0xC08 0xC0C 0xC10 0xC14 0xC18>;
		ds-settings = <0x44441111
		0x44441111
		0x44441111
		0x44441111
		0x44441111
		0x44441111
		0x44441111
		0x44441111
		0x44441111
		0x44441111
		0x44441111
		0x44441111
		0x44441111
		0x44441111
		0x44441111
		0x44441111
		0x00000103>;
		max-clk-svs = <300000000>;
		max-clk-nominal = <465000000>;
		max-clk-turbo = <600000000>;
		};