Loading arch/arm/mm/proc-v6.S +7 −13 Original line number Diff line number Diff line Loading @@ -111,12 +111,6 @@ ENTRY(cpu_v6_switch_mm) mcr p15, 0, r1, c13, c0, 1 @ set context ID mov pc, lr #define nG (1 << 11) #define APX (1 << 9) #define AP1 (1 << 5) #define AP0 (1 << 4) #define XN (1 << 0) /* * cpu_v6_set_pte(ptep, pte) * Loading @@ -141,22 +135,22 @@ ENTRY(cpu_v6_set_pte) bic r2, r1, #0x00000ff0 bic r2, r2, #0x00000003 orr r2, r2, #AP0 | 2 orr r2, r2, #PTE_EXT_AP0 | 2 tst r1, #L_PTE_WRITE tstne r1, #L_PTE_DIRTY orreq r2, r2, #APX orreq r2, r2, #PTE_EXT_APX tst r1, #L_PTE_USER orrne r2, r2, #AP1 | nG tstne r2, #APX bicne r2, r2, #APX | AP0 orrne r2, r2, #PTE_EXT_AP1 | PTE_EXT_NG tstne r2, #PTE_EXT_APX bicne r2, r2, #PTE_EXT_APX | PTE_EXT_AP0 tst r1, #L_PTE_YOUNG biceq r2, r2, #APX | AP1 | AP0 biceq r2, r2, #PTE_EXT_APX | PTE_EXT_AP_MASK @ tst r1, #L_PTE_EXEC @ orreq r2, r2, #XN @ orreq r2, r2, #PTE_EXT_XN tst r1, #L_PTE_PRESENT moveq r2, #0 Loading include/asm-arm/pgtable.h +9 −3 Original line number Diff line number Diff line Loading @@ -188,12 +188,18 @@ extern void __pgd_error(const char *file, int line, unsigned long val); /* * - extended small page/tiny page */ #define PTE_EXT_XN (1 << 0) /* v6 */ #define PTE_EXT_AP_MASK (3 << 4) #define PTE_EXT_AP0 (1 << 4) #define PTE_EXT_AP1 (2 << 4) #define PTE_EXT_AP_UNO_SRO (0 << 4) #define PTE_EXT_AP_UNO_SRW (1 << 4) #define PTE_EXT_AP_URO_SRW (2 << 4) #define PTE_EXT_AP_URW_SRW (3 << 4) #define PTE_EXT_AP_UNO_SRW (PTE_EXT_AP0) #define PTE_EXT_AP_URO_SRW (PTE_EXT_AP1) #define PTE_EXT_AP_URW_SRW (PTE_EXT_AP1|PTE_EXT_AP0) #define PTE_EXT_TEX(x) ((x) << 6) /* v5 */ #define PTE_EXT_APX (1 << 9) /* v6 */ #define PTE_EXT_SHARED (1 << 10) /* v6 */ #define PTE_EXT_NG (1 << 11) /* v6 */ /* * - small page Loading Loading
arch/arm/mm/proc-v6.S +7 −13 Original line number Diff line number Diff line Loading @@ -111,12 +111,6 @@ ENTRY(cpu_v6_switch_mm) mcr p15, 0, r1, c13, c0, 1 @ set context ID mov pc, lr #define nG (1 << 11) #define APX (1 << 9) #define AP1 (1 << 5) #define AP0 (1 << 4) #define XN (1 << 0) /* * cpu_v6_set_pte(ptep, pte) * Loading @@ -141,22 +135,22 @@ ENTRY(cpu_v6_set_pte) bic r2, r1, #0x00000ff0 bic r2, r2, #0x00000003 orr r2, r2, #AP0 | 2 orr r2, r2, #PTE_EXT_AP0 | 2 tst r1, #L_PTE_WRITE tstne r1, #L_PTE_DIRTY orreq r2, r2, #APX orreq r2, r2, #PTE_EXT_APX tst r1, #L_PTE_USER orrne r2, r2, #AP1 | nG tstne r2, #APX bicne r2, r2, #APX | AP0 orrne r2, r2, #PTE_EXT_AP1 | PTE_EXT_NG tstne r2, #PTE_EXT_APX bicne r2, r2, #PTE_EXT_APX | PTE_EXT_AP0 tst r1, #L_PTE_YOUNG biceq r2, r2, #APX | AP1 | AP0 biceq r2, r2, #PTE_EXT_APX | PTE_EXT_AP_MASK @ tst r1, #L_PTE_EXEC @ orreq r2, r2, #XN @ orreq r2, r2, #PTE_EXT_XN tst r1, #L_PTE_PRESENT moveq r2, #0 Loading
include/asm-arm/pgtable.h +9 −3 Original line number Diff line number Diff line Loading @@ -188,12 +188,18 @@ extern void __pgd_error(const char *file, int line, unsigned long val); /* * - extended small page/tiny page */ #define PTE_EXT_XN (1 << 0) /* v6 */ #define PTE_EXT_AP_MASK (3 << 4) #define PTE_EXT_AP0 (1 << 4) #define PTE_EXT_AP1 (2 << 4) #define PTE_EXT_AP_UNO_SRO (0 << 4) #define PTE_EXT_AP_UNO_SRW (1 << 4) #define PTE_EXT_AP_URO_SRW (2 << 4) #define PTE_EXT_AP_URW_SRW (3 << 4) #define PTE_EXT_AP_UNO_SRW (PTE_EXT_AP0) #define PTE_EXT_AP_URO_SRW (PTE_EXT_AP1) #define PTE_EXT_AP_URW_SRW (PTE_EXT_AP1|PTE_EXT_AP0) #define PTE_EXT_TEX(x) ((x) << 6) /* v5 */ #define PTE_EXT_APX (1 << 9) /* v6 */ #define PTE_EXT_SHARED (1 << 10) /* v6 */ #define PTE_EXT_NG (1 << 11) /* v6 */ /* * - small page Loading
Russell King <rmk+kernel@arm.linux.org.uk>Russell King <rmk+kernel@arm.linux.org.uk>