Loading qcom/scuba-idp.dtsi +23 −0 Original line number Diff line number Diff line Loading @@ -100,6 +100,29 @@ qcom,platform-en-gpio = <&tlmm 105 0>; }; &dsi_td4330_truly_v2_video { qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm"; pwms = <&pm2250_pwm3 0 0>; qcom,bl-pmic-pwm-period-usecs = <100>; qcom,mdss-dsi-bl-min-level = <1>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,platform-reset-gpio = <&tlmm 82 0>; qcom,platform-en-gpio = <&tlmm 105 0>; }; &dsi_td4330_truly_v2_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm"; pwms = <&pm2250_pwm3 0 0>; qcom,bl-pmic-pwm-period-usecs = <100>; qcom,mdss-dsi-bl-min-level = <1>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,platform-te-gpio = <&tlmm 81 0>; qcom,platform-reset-gpio = <&tlmm 82 0>; qcom,platform-en-gpio = <&tlmm 105 0>; }; &sde_dsi { qcom,dsi-default-panel = <&dsi_nt36525_truly_video>; }; Loading qcom/scuba-sde-display.dtsi +64 −0 Original line number Diff line number Diff line #include <dt-bindings/clock/mdss-14nm-pll-clk.h> #include "dsi-panel-nt36525-truly-hd-plus-vid.dtsi" #include "dsi-panel-td4330-truly-v2-singlemipi-fhd-vid.dtsi" #include "dsi-panel-td4330-truly-v2-singlemipi-fhd-cmd.dtsi" &soc { dsi_panel_pwr_supply: dsi_panel_pwr_supply { Loading Loading @@ -143,3 +145,65 @@ }; }; }; &dsi_td4330_truly_v2_video { qcom,mdss-dsi-t-clk-post = <0x0e>; qcom,mdss-dsi-t-clk-pre = <0x35>; qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0", "src_byte_clk0", "src_pixel_clk0", "shadow_byte_clk0", "shadow_pixel_clk0"; qcom,mdss-dsi-display-timings { timing@0 { qcom,mdss-dsi-panel-phy-timings = [25 20 09 0A 06 03 04 a0 25 20 09 0A 06 03 04 a0 25 20 09 0A 06 03 04 a0 25 20 09 0A 06 03 04 a0 25 1F 09 0A 06 03 04 a0]; qcom,display-topology = <1 0 1>; qcom,default-topology-index = <0>; }; timing@1 { qcom,mdss-dsi-panel-phy-timings = [26 20 09 0B 06 02 04 a0 26 20 09 0B 06 02 04 a0 26 20 09 0B 06 02 04 a0 26 20 09 0B 06 02 04 a0 26 1F 09 0B 06 02 04 a0]; qcom,display-topology = <1 0 1>; qcom,default-topology-index = <0>; }; }; }; &dsi_td4330_truly_v2_cmd { qcom,mdss-dsi-t-clk-post = <0x0e>; qcom,mdss-dsi-t-clk-pre = <0x36>; qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; qcom,mdss-dsi-display-timings { timing@0 { qcom,mdss-dsi-panel-phy-timings = [26 20 09 0B 06 02 04 a0 26 20 09 0B 06 02 04 a0 26 20 09 0B 06 02 04 a0 26 20 09 0B 06 02 04 a0 26 1F 09 0B 06 02 04 a0]; qcom,display-topology = <1 0 1>; qcom,default-topology-index = <0>; qcom,partial-update-enabled = "single_roi"; qcom,panel-roi-alignment = <40 40 40 40 40 40>; }; timing@1 { qcom,mdss-dsi-panel-phy-timings = [25 20 09 0A 06 03 04 a0 25 20 09 0A 06 03 04 a0 25 20 09 0A 06 03 04 a0 25 20 09 0A 06 03 04 a0 25 1F 09 0A 06 03 04 a0]; qcom,display-topology = <1 0 1>; qcom,default-topology-index = <0>; }; }; }; Loading
qcom/scuba-idp.dtsi +23 −0 Original line number Diff line number Diff line Loading @@ -100,6 +100,29 @@ qcom,platform-en-gpio = <&tlmm 105 0>; }; &dsi_td4330_truly_v2_video { qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm"; pwms = <&pm2250_pwm3 0 0>; qcom,bl-pmic-pwm-period-usecs = <100>; qcom,mdss-dsi-bl-min-level = <1>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,platform-reset-gpio = <&tlmm 82 0>; qcom,platform-en-gpio = <&tlmm 105 0>; }; &dsi_td4330_truly_v2_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply_no_labibb>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_pwm"; pwms = <&pm2250_pwm3 0 0>; qcom,bl-pmic-pwm-period-usecs = <100>; qcom,mdss-dsi-bl-min-level = <1>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,platform-te-gpio = <&tlmm 81 0>; qcom,platform-reset-gpio = <&tlmm 82 0>; qcom,platform-en-gpio = <&tlmm 105 0>; }; &sde_dsi { qcom,dsi-default-panel = <&dsi_nt36525_truly_video>; }; Loading
qcom/scuba-sde-display.dtsi +64 −0 Original line number Diff line number Diff line #include <dt-bindings/clock/mdss-14nm-pll-clk.h> #include "dsi-panel-nt36525-truly-hd-plus-vid.dtsi" #include "dsi-panel-td4330-truly-v2-singlemipi-fhd-vid.dtsi" #include "dsi-panel-td4330-truly-v2-singlemipi-fhd-cmd.dtsi" &soc { dsi_panel_pwr_supply: dsi_panel_pwr_supply { Loading Loading @@ -143,3 +145,65 @@ }; }; }; &dsi_td4330_truly_v2_video { qcom,mdss-dsi-t-clk-post = <0x0e>; qcom,mdss-dsi-t-clk-pre = <0x35>; qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0", "src_byte_clk0", "src_pixel_clk0", "shadow_byte_clk0", "shadow_pixel_clk0"; qcom,mdss-dsi-display-timings { timing@0 { qcom,mdss-dsi-panel-phy-timings = [25 20 09 0A 06 03 04 a0 25 20 09 0A 06 03 04 a0 25 20 09 0A 06 03 04 a0 25 20 09 0A 06 03 04 a0 25 1F 09 0A 06 03 04 a0]; qcom,display-topology = <1 0 1>; qcom,default-topology-index = <0>; }; timing@1 { qcom,mdss-dsi-panel-phy-timings = [26 20 09 0B 06 02 04 a0 26 20 09 0B 06 02 04 a0 26 20 09 0B 06 02 04 a0 26 20 09 0B 06 02 04 a0 26 1F 09 0B 06 02 04 a0]; qcom,display-topology = <1 0 1>; qcom,default-topology-index = <0>; }; }; }; &dsi_td4330_truly_v2_cmd { qcom,mdss-dsi-t-clk-post = <0x0e>; qcom,mdss-dsi-t-clk-pre = <0x36>; qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; qcom,mdss-dsi-display-timings { timing@0 { qcom,mdss-dsi-panel-phy-timings = [26 20 09 0B 06 02 04 a0 26 20 09 0B 06 02 04 a0 26 20 09 0B 06 02 04 a0 26 20 09 0B 06 02 04 a0 26 1F 09 0B 06 02 04 a0]; qcom,display-topology = <1 0 1>; qcom,default-topology-index = <0>; qcom,partial-update-enabled = "single_roi"; qcom,panel-roi-alignment = <40 40 40 40 40 40>; }; timing@1 { qcom,mdss-dsi-panel-phy-timings = [25 20 09 0A 06 03 04 a0 25 20 09 0A 06 03 04 a0 25 20 09 0A 06 03 04 a0 25 20 09 0A 06 03 04 a0 25 1F 09 0A 06 03 04 a0]; qcom,display-topology = <1 0 1>; qcom,default-topology-index = <0>; }; }; };