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Commit 1aaccb5f authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull RTC updates from Alexandre Belloni:
 "Setting the supported range from drivers for RTCs failing soon has
  started. A few fixes are developed along the way. Some drivers have
  been switched to SPDX by their maintainers.

  Subsystem:

   - rework of the rtc-test driver which allows to test the core more
     thoroughly

   - rtc_set_alarm() now fails early when alarms are not supported

  Drivers:

   - mktime() is now replaced by mktime64()

   - RTC range added for 88pm80x, ab-b5ze-s3, at91rm9200,
     brcmstb-waketimer, ds1685, ftrtc010, ls1x, mxc_v2, rx8581, sprd,
     st-lpc, tps6586x, tps65910 and vr41xx

   - fixed a possible race condition in probe functions

   - pxa: fix the probe function that is broken since v4.3

   - stm32: now supports stm32mp1"

* tag 'rtc-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: (78 commits)
  rtc: pxa: fix probe function
  rtc: cros-ec: Switch to SPDX identifier.
  rtc: cros-ec: Make license text and module license match.
  rtc: ensure rtc_set_alarm fails when alarms are not supported
  rtc: test: remove alarm support from the first device
  rtc: test: convert to devm_rtc_allocate_device
  rtc: ftrtc010: let the core handle range
  rtc: ftrtc010: handle dates after 2106
  rtc: ftrtc010: switch to devm_rtc_allocate_device
  rtc: mrst: switch to devm functions
  rtc: sunxi: fix possible race condition
  rtc: test: remove irq sysfs file
  rtc: test: emulate alarms using timers
  rtc: test: store time as an offset to system time
  rtc: test: allow registering many devices
  rtc: test: remove useless proc info
  rtc: ds1685: Add range
  rtc: ds1685: fix possible race condition
  rtc: sprd: Add new RTC power down check method
  rtc: sun6i: Fix bit_idx value for clk_register_gate
  ...
parents ab0b2e59 e4302aec
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+1 −1
Original line number Diff line number Diff line
@@ -9,7 +9,7 @@ Optional properties:

Example:

rtc: nxp,rtc-pcf2123@3 {
pcf2123: rtc@3 {
	compatible = "nxp,rtc-pcf2123"
	reg = <3>
	spi-cs-high;
+26 −11
Original line number Diff line number Diff line
STM32 Real Time Clock

Required properties:
- compatible: can be either "st,stm32-rtc" or "st,stm32h7-rtc", depending on
  the device is compatible with stm32(f4/f7) or stm32h7.
- compatible: can be one of the following:
  - "st,stm32-rtc" for devices compatible with stm32(f4/f7).
  - "st,stm32h7-rtc" for devices compatible with stm32h7.
  - "st,stm32mp1-rtc" for devices compatible with stm32mp1.
- reg: address range of rtc register set.
- clocks: can use up to two clocks, depending on part used:
  - "rtc_ck": RTC clock source.
    It is required on stm32(f4/f7) and stm32h7.
  - "pclk": RTC APB interface clock.
    It is not present on stm32(f4/f7).
    It is required on stm32h7.
    It is required on stm32(h7/mp1).
- clock-names: must be "rtc_ck" and "pclk".
    It is required only on stm32h7.
    It is required on stm32(h7/mp1).
- interrupt-parent: phandle for the interrupt controller.
- interrupts: rtc alarm interrupt.
- st,syscfg: phandle for pwrcfg, mandatory to disable/enable backup domain
  (RTC registers) write protection.
    It is required on stm32(f4/f7/h7).
- interrupts: rtc alarm interrupt. On stm32mp1, a second interrupt is required
  for rtc alarm wakeup interrupt.
- st,syscfg: phandle/offset/mask triplet. The phandle to pwrcfg used to
  access control register at offset, and change the dbp (Disable Backup
  Protection) bit represented by the mask, mandatory to disable/enable backup
  domain (RTC registers) write protection.
    It is required on stm32(f4/f7/h7).

Optional properties (to override default rtc_ck parent clock):
Optional properties (to override default rtc_ck parent clock on stm32(f4/f7/h7):
- assigned-clocks: reference to the rtc_ck clock entry.
- assigned-clock-parents: phandle of the new parent clock of rtc_ck.

@@ -31,7 +37,7 @@ Example:
		assigned-clock-parents = <&rcc 1 CLK_LSE>;
		interrupt-parent = <&exti>;
		interrupts = <17 1>;
		st,syscfg = <&pwrcfg>;
		st,syscfg = <&pwrcfg 0x00 0x100>;
	};

	rtc: rtc@58004000 {
@@ -44,5 +50,14 @@ Example:
		interrupt-parent = <&exti>;
		interrupts = <17 1>;
		interrupt-names = "alarm";
		st,syscfg = <&pwrcfg>;
		st,syscfg = <&pwrcfg 0x00 0x100>;
	};

	rtc: rtc@5c004000 {
		compatible = "st,stm32mp1-rtc";
		reg = <0x5c004000 0x400>;
		clocks = <&rcc RTCAPB>, <&rcc RTC>;
		clock-names = "pclk", "rtc_ck";
		interrupts-extended = <&intc GIC_SPI 3 IRQ_TYPE_NONE>,
				      <&exti 19 1>;
	};
+1 −1
Original line number Diff line number Diff line
@@ -1613,7 +1613,7 @@ config RTC_DRV_JZ4740
	  If you say yes here you get support for the Ingenic JZ47xx SoCs RTC
	  controllers.

	  This driver can also be buillt as a module. If so, the module
	  This driver can also be built as a module. If so, the module
	  will be called rtc-jz4740.

config RTC_DRV_LPC24XX
+5 −0
Original line number Diff line number Diff line
@@ -441,6 +441,11 @@ int rtc_set_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm)
{
	int err;

	if (!rtc->ops)
		return -ENODEV;
	else if (!rtc->ops->set_alarm)
		return -EINVAL;

	err = rtc_valid_tm(&alarm->time);
	if (err != 0)
		return err;
+1 −1
Original line number Diff line number Diff line
@@ -94,7 +94,7 @@ int rtc_nvmem_register(struct rtc_device *rtc,
	nvmem_config->dev = rtc->dev.parent;
	nvmem_config->owner = rtc->owner;
	rtc->nvmem = nvmem_register(nvmem_config);
	if (IS_ERR_OR_NULL(rtc->nvmem))
	if (IS_ERR(rtc->nvmem))
		return PTR_ERR(rtc->nvmem);

	/* Register the old ABI */
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