Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1a9c5efa authored by Anson Huang's avatar Anson Huang Committed by Wim Van Sebroeck
Browse files

watchdog: imx2_wdt: disable watchdog timer during low power mode 



We should set watchdog timer to be disabled in low power mode,
as there is no service running in background, otherwise, system
will reset unexpected.

Signed-off-by: default avatarAnson Huang <b20788@freescale.com>
Acked-by: default avatarShawn Guo <shawn.guo@linaro.org>
Reviewed-by: default avatarGuenter Roeck <linux@roeck-us.net>
Signed-off-by: default avatarWim Van Sebroeck <wim@iguana.be>
parent cffc9a60

drivers/watchdog/imx2_wdt.c

+4 −0
Original line number Diff line number Diff line
@@ -2,6 +2,7 @@ 
 * Watchdog driver for IMX2 and later processors

 *

 *  Copyright (C) 2010 Wolfram Sang, Pengutronix e.K. <w.sang@pengutronix.de>

 *  Copyright (C) 2014 Freescale Semiconductor, Inc.

 *

 * some parts adapted by similar drivers from Darius Augulis and Vladimir

 * Zapolskiy, additional improvements by Wim Van Sebroeck.
@@ -40,6 +41,7 @@ 
#define IMX2_WDT_WCR_WT		(0xFF << 8)	/* -> Watchdog Timeout Field */

#define IMX2_WDT_WCR_WRE	(1 << 3)	/* -> WDOG Reset Enable */

#define IMX2_WDT_WCR_WDE	(1 << 2)	/* -> Watchdog Enable */

#define IMX2_WDT_WCR_WDZST	(1 << 0)	/* -> Watchdog timer Suspend */



#define IMX2_WDT_WSR		0x02		/* Service Register */

#define IMX2_WDT_SEQ1		0x5555		/* -> service sequence 1 */
@@ -87,6 +89,8 @@ static inline void imx2_wdt_setup(void) 
{

	u16 val = __raw_readw(imx2_wdt.base + IMX2_WDT_WCR);



	/* Suspend timer in low power mode, write once-only */

	val |= IMX2_WDT_WCR_WDZST;

	/* Strip the old watchdog Time-Out value */

	val &= ~IMX2_WDT_WCR_WT;

	/* Generate reset if WDOG times out */