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Commit 1a8c176b authored by Chen-Yu Tsai's avatar Chen-Yu Tsai Committed by Maxime Ripard
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ARM: sun8i: a83t: Add CCU device nodes 



Now that we have support for the A83T CCU, add a device node for it,
and replace any existing placeholder clock phandles with the correct
ones.

Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
parent d050971c

arch/arm/boot/dts/sun8i-a83t.dtsi

+13 −2
Original line number Original line Diff line number Diff line
@@ -162,13 +162,23 @@ 
		#size-cells = <1>;

		#size-cells = <1>;

		ranges;

		ranges;





		ccu: clock@1c20000 {

			compatible = "allwinner,sun8i-a83t-ccu";

			reg = <0x01c20000 0x400>;

			clocks = <&osc24M>, <&osc16Md512>;

			clock-names = "hosc", "losc";

			#clock-cells = <1>;

			#reset-cells = <1>;

		};



		pio: pinctrl@1c20800 {

		pio: pinctrl@1c20800 {

			compatible = "allwinner,sun8i-a83t-pinctrl";

			compatible = "allwinner,sun8i-a83t-pinctrl";

			interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,

			interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;

				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;

			reg = <0x01c20800 0x400>;

			reg = <0x01c20800 0x400>;

			clocks = <&osc24M>;

			clocks = <&ccu 45>, <&osc24M>, <&osc16Md512>;

			clock-names = "apb", "hosc", "losc";

			gpio-controller;

			gpio-controller;

			interrupt-controller;

			interrupt-controller;

			#interrupt-cells = <3>;

			#interrupt-cells = <3>;
@@ -214,7 +224,8 @@ 
			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;

			reg-shift = <2>;

			reg-shift = <2>;

			reg-io-width = <4>;

			reg-io-width = <4>;

			clocks = <&osc24M>;

			clocks = <&ccu 53>;

			resets = <&ccu 40>;

			status = "disabled";

			status = "disabled";

		};

		};