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Commit 19d78a61 authored by Dimitri Sivanich's avatar Dimitri Sivanich Committed by Dan Williams
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x86: poll waiting for I/OAT DMA channel status



For certain system configurations a 5 usec udelay before checking I/OAT DMA
channel status is sometimes not sufficient, resulting in a false failure
status and unnecessary freeing of channel resources.  Conversely, for many
configurations 5 usec is longer than necessary.

Loop for up to 20 usec waiting for successful status before failing.

Signed-off-by: default avatarDimitri Sivanich <sivanich@sgi.com>
Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
parent 5dbd05d4
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+6 −2
Original line number Diff line number Diff line
@@ -507,6 +507,7 @@ int ioat2_alloc_chan_resources(struct dma_chan *c)
	struct ioat_ring_ent **ring;
	u64 status;
	int order;
	int i = 0;

	/* have we already been set up? */
	if (ioat->ring)
@@ -547,8 +548,11 @@ int ioat2_alloc_chan_resources(struct dma_chan *c)
	ioat2_start_null_desc(ioat);

	/* check that we got off the ground */
	udelay(5);
	do {
		udelay(1);
		status = ioat_chansts(chan);
	} while (i++ < 20 && !is_ioat_active(status) && !is_ioat_idle(status));

	if (is_ioat_active(status) || is_ioat_idle(status)) {
		set_bit(IOAT_RUN, &chan->state);
		return 1 << ioat->alloc_order;