Merge "dt-bindings: iio: Add PMIC7 ADC support"

/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.

 */

#ifndef _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H

#define _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H

#ifndef PMK8350_SID

#define PMK8350_SID					0

#endif

/* ADC channels for PMK8350_ADC for PMIC7 */

#define PMK8350_ADC7_REF_GND			(PMK8350_SID << 8 | 0x0)

#define PMK8350_ADC7_1P25VREF			(PMK8350_SID << 8 | 0x01)

#define PMK8350_ADC7_VREF_VADC			(PMK8350_SID << 8 | 0x02)

#define PMK8350_ADC7_DIE_TEMP			(PMK8350_SID << 8 | 0x03)

#define PMK8350_ADC7_AMUX_THM1			(PMK8350_SID << 8 | 0x04)

#define PMK8350_ADC7_AMUX_THM2			(PMK8350_SID << 8 | 0x05)

#define PMK8350_ADC7_AMUX_THM3			(PMK8350_SID << 8 | 0x06)

#define PMK8350_ADC7_AMUX_THM4			(PMK8350_SID << 8 | 0x07)

#define PMK8350_ADC7_AMUX_THM5			(PMK8350_SID << 8 | 0x08)

/* 30k pull-up1 */

#define PMK8350_ADC7_AMUX_THM1_30K_PU		(PMK8350_SID << 8 | 0x24)

#define PMK8350_ADC7_AMUX_THM2_30K_PU		(PMK8350_SID << 8 | 0x25)

#define PMK8350_ADC7_AMUX_THM3_30K_PU		(PMK8350_SID << 8 | 0x26)

#define PMK8350_ADC7_AMUX_THM4_30K_PU		(PMK8350_SID << 8 | 0x27)

#define PMK8350_ADC7_AMUX_THM5_30K_PU		(PMK8350_SID << 8 | 0x28)

/* 100k pull-up2 */

#define PMK8350_ADC7_AMUX_THM1_100K_PU		(PMK8350_SID << 8 | 0x44)

#define PMK8350_ADC7_AMUX_THM2_100K_PU		(PMK8350_SID << 8 | 0x45)

#define PMK8350_ADC7_AMUX_THM3_100K_PU		(PMK8350_SID << 8 | 0x46)

#define PMK8350_ADC7_AMUX_THM4_100K_PU		(PMK8350_SID << 8 | 0x47)

#define PMK8350_ADC7_AMUX_THM5_100K_PU		(PMK8350_SID << 8 | 0x48)

/* 400k pull-up3 */

#define PMK8350_ADC7_AMUX_THM1_400K_PU		(PMK8350_SID << 8 | 0x64)

#define PMK8350_ADC7_AMUX_THM2_400K_PU		(PMK8350_SID << 8 | 0x65)

#define PMK8350_ADC7_AMUX_THM3_400K_PU		(PMK8350_SID << 8 | 0x66)

#define PMK8350_ADC7_AMUX_THM4_400K_PU		(PMK8350_SID << 8 | 0x67)

#define PMK8350_ADC7_AMUX_THM5_400K_PU		(PMK8350_SID << 8 | 0x68)

#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_PMK8350_H */

/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (c) 2012-2014,2018-2019 The Linux Foundation. All rights reserved.

 * Copyright (c) 2012-2014,2018-2020 The Linux Foundation. All rights reserved.

 */

#define ADC_SCALE_HW_CALIB_BATT_THERM_400K	0xE

#define ADC_SCALE_HW_CALIB_PM5_SMB1398_TEMP	0xF

/* ADC channels for ADC for PMIC7 */

#define ADC7_REF_GND				0x00

#define ADC7_1P25VREF				0x01

#define ADC7_VREF_VADC				0x02

#define ADC7_DIE_TEMP				0x03

#define ADC7_AMUX_THM1				0x04

#define ADC7_AMUX_THM2				0x05

#define ADC7_AMUX_THM3				0x06

#define ADC7_AMUX_THM4				0x07

#define ADC7_AMUX_THM5				0x08

#define ADC7_AMUX_THM6				0x09

#define ADC7_GPIO1				0x0a

#define ADC7_GPIO2				0x0b

#define ADC7_GPIO3				0x0c

#define ADC7_GPIO4				0x0d

#define ADC7_CHG_TEMP				0x10

#define ADC7_USB_IN_V_16			0x11

#define ADC7_VDC_16				0x12

#define ADC7_CC1_ID				0x13

#define ADC7_VREF_BAT_THERM			0x15

#define ADC7_IIN_FB				0x17

/* 30k pull-up1 */

#define ADC7_AMUX_THM1_30K_PU			0x24

#define ADC7_AMUX_THM2_30K_PU			0x25

#define ADC7_AMUX_THM3_30K_PU			0x26

#define ADC7_AMUX_THM4_30K_PU			0x27

#define ADC7_AMUX_THM5_30K_PU			0x28

#define ADC7_AMUX_THM6_30K_PU			0x29

#define ADC7_GPIO1_30K_PU			0x2a

#define ADC7_GPIO2_30K_PU			0x2b

#define ADC7_GPIO3_30K_PU			0x2c

#define ADC7_GPIO4_30K_PU			0x2d

#define ADC7_CC1_ID_30K_PU			0x33

/* 100k pull-up2 */

#define ADC7_AMUX_THM1_100K_PU			0x44

#define ADC7_AMUX_THM2_100K_PU			0x45

#define ADC7_AMUX_THM3_100K_PU			0x46

#define ADC7_AMUX_THM4_100K_PU			0x47

#define ADC7_AMUX_THM5_100K_PU			0x48

#define ADC7_AMUX_THM6_100K_PU			0x49

#define ADC7_GPIO1_100K_PU			0x4a

#define ADC7_GPIO2_100K_PU			0x4b

#define ADC7_GPIO3_100K_PU			0x4c

#define ADC7_GPIO4_100K_PU			0x4d

#define ADC7_CC1_ID_100K_PU			0x53

/* 400k pull-up3 */

#define ADC7_AMUX_THM1_400K_PU			0x64

#define ADC7_AMUX_THM2_400K_PU			0x65

#define ADC7_AMUX_THM3_400K_PU			0x66

#define ADC7_AMUX_THM4_400K_PU			0x67

#define ADC7_AMUX_THM5_400K_PU			0x68

#define ADC7_AMUX_THM6_400K_PU			0x69

#define ADC7_GPIO1_400K_PU			0x6a

#define ADC7_GPIO2_400K_PU			0x6b

#define ADC7_GPIO3_400K_PU			0x6c

#define ADC7_GPIO4_400K_PU			0x6d

#define ADC7_CC1_ID_400K_PU			0x73

/* 1/3 Divider */

#define ADC7_GPIO1_DIV3				0x8a

#define ADC7_GPIO2_DIV3				0x8b

#define ADC7_GPIO3_DIV3				0x8c

#define ADC7_GPIO4_DIV3				0x8d

#define ADC7_VPH_PWR				0x8e

#define ADC7_VBAT_SNS				0x8f

#define ADC7_SBUx				0x94

#define ADC7_VBAT_2S_MID			0x96

/* VADC scale function index */

#define ADC_SCALE_HW_CALIB_THERM_100K_PU_PM7	0x10

#define ADC_SCALE_HW_CALIB_PMIC_THERM_PM7	0x11

#endif /* _DT_BINDINGS_QCOM_SPMI_VADC_H */