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Commit 19b8cba2 authored by David S. Miller's avatar David S. Miller
Browse files
parents 263e69cb adef199c
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+2 −0
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@@ -743,6 +743,8 @@ P: Nick Kossifidis
M:	mickflemm@gmail.com
P:	Luis R. Rodriguez
M:	mcgrof@gmail.com
P:	Bob Copeland
M:	me@bobcopeland.com
L:	linux-wireless@vger.kernel.org
L:	ath5k-devel@lists.ath5k.org
S:	Maintained
+1 −3
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@@ -2942,10 +2942,8 @@ static void ath5k_configure_filter(struct ieee80211_hw *hw,
		sc->opmode != NL80211_IFTYPE_MESH_POINT &&
		test_bit(ATH_STAT_PROMISC, sc->status))
		rfilt |= AR5K_RX_FILTER_PROM;
	if (sc->opmode == NL80211_IFTYPE_STATION ||
		sc->opmode == NL80211_IFTYPE_ADHOC) {
	if (sc->opmode == NL80211_IFTYPE_ADHOC)
		rfilt |= AR5K_RX_FILTER_BEACON;
	}

	/* Set filters */
	ath5k_hw_set_rx_filter(ah,rfilt);
+1 −1
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@@ -339,7 +339,7 @@ static struct {
	{ ATH5K_DEBUG_BEACON,	"beacon",	"beacon handling" },
	{ ATH5K_DEBUG_CALIBRATE, "calib",	"periodic calibration" },
	{ ATH5K_DEBUG_TXPOWER,	"txpower",	"transmit power setting" },
	{ ATH5K_DEBUG_LED,	"led",		"LED mamagement" },
	{ ATH5K_DEBUG_LED,	"led",		"LED management" },
	{ ATH5K_DEBUG_DUMP_RX,	"dumprx",	"print received skb content" },
	{ ATH5K_DEBUG_DUMP_TX,	"dumptx",	"print transmit skb content" },
	{ ATH5K_DEBUG_DUMPBANDS, "dumpbands",	"dump bands" },
+2 −0
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@@ -806,6 +806,8 @@ static const struct ath5k_ini_mode ar5212_rf5111_ini_mode_end[] = {
		{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } },
	{ AR5K_PHY(642),
		{ 0xd03e6788, 0xd03e6788, 0xd03e6788, 0xd03e6788, 0xd03e6788 } },
	{ 0xa228,
		{ 0x000001b5, 0x000001b5, 0x000001b5, 0x000001b5, 0x000001b5 } },
	{ 0xa23c,
		{ 0x13c889af, 0x13c889af, 0x13c889af, 0x13c889af, 0x13c889af } },
};
+7 −15
Original line number Diff line number Diff line
@@ -537,9 +537,10 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
		mdelay(1);

		/*
		 * Write some more initial register settings
		 * Write some more initial register settings for revised chips
		 */
		if (ah->ah_version == AR5K_AR5212) {
		if (ah->ah_version == AR5K_AR5212 &&
		    ah->ah_phy_revision > 0x41) {
			ath5k_hw_reg_write(ah, 0x0002a002, 0x982c);

			if (channel->hw_value == CHANNEL_G)
@@ -558,19 +559,10 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
			else
				ath5k_hw_reg_write(ah, 0x00000000, 0x994c);

			/* Some bits are disabled here, we know nothing about
			 * register 0xa228 yet, most of the times this ends up
			 * with a value 0x9b5 -haven't seen any dump with
			 * a different value- */
			/* Got this from decompiling binary HAL */
			data = ath5k_hw_reg_read(ah, 0xa228);
			data &= 0xfffffdff;
			ath5k_hw_reg_write(ah, data, 0xa228);

			data = ath5k_hw_reg_read(ah, 0xa228);
			data &= 0xfffe03ff;
			ath5k_hw_reg_write(ah, data, 0xa228);
			data = 0;
			/* Got this from legacy-hal */
			AR5K_REG_DISABLE_BITS(ah, 0xa228, 0x200);

			AR5K_REG_MASKED_BITS(ah, 0xa228, 0x800, 0xfffe03ff);

			/* Just write 0x9b5 ? */
			/* ath5k_hw_reg_write(ah, 0x000009b5, 0xa228); */
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