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Commit 192bbe9d authored by Maxime Chevallier's avatar Maxime Chevallier Committed by Greg Kroah-Hartman
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net: mvpp2: Don't check for 3 consecutive Idle frames for 10G links 



[ Upstream commit bba18318e7d1d5c8b0bbafd65010a0cee3c65608 ]

PPv2's XLGMAC can wait for 3 idle frames before triggering a link up
event. This can cause the link to be stuck low when there's traffic on
the interface, so disable this feature.

Fixes: 4bb04326 ("net: mvpp2: phylink support")
Signed-off-by: default avatarMaxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent a1e5a76d

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

+3 −3
Original line number Diff line number Diff line
@@ -4412,9 +4412,9 @@ static void mvpp2_xlg_config(struct mvpp2_port *port, unsigned int mode, 
	if (state->pause & MLO_PAUSE_RX)

		ctrl0 |= MVPP22_XLG_CTRL0_RX_FLOW_CTRL_EN;



	ctrl4 &= ~MVPP22_XLG_CTRL4_MACMODSELECT_GMAC;

	ctrl4 |= MVPP22_XLG_CTRL4_FWD_FC | MVPP22_XLG_CTRL4_FWD_PFC |

		 MVPP22_XLG_CTRL4_EN_IDLE_CHECK;

	ctrl4 &= ~(MVPP22_XLG_CTRL4_MACMODSELECT_GMAC |

		   MVPP22_XLG_CTRL4_EN_IDLE_CHECK);

	ctrl4 |= MVPP22_XLG_CTRL4_FWD_FC | MVPP22_XLG_CTRL4_FWD_PFC;



	writel(ctrl0, port->base + MVPP22_XLG_CTRL0_REG);

	writel(ctrl4, port->base + MVPP22_XLG_CTRL4_REG);