Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 18f5a374 authored by Eliad Peller's avatar Eliad Peller Committed by Emmanuel Grumbach
Browse files

iwlwifi: pcie: reset write pointer on ict reset 



Since the CSR_DRAM_INIT_TBL_WRITE_POINTER bit wasn't set
on ict reset, in some flows (like disable ict followed by
immediate reset ict) the driver and hardware went out
of sync (the driver cleared the ict_index, while the hw
kept it intact).

Fix it by setting the flag when resetting ict.

Signed-off-by: default avatarEliad Peller <eliad@wizery.com>
Signed-off-by: default avatarEmmanuel Grumbach <emmanuel.grumbach@intel.com>
parent 6dfb36c8

drivers/net/wireless/iwlwifi/iwl-csr.h

+1 −0
Original line number Diff line number Diff line
@@ -422,6 +422,7 @@ enum { 


/* DRAM INT TABLE */

#define CSR_DRAM_INT_TBL_ENABLE		(1 << 31)

#define CSR_DRAM_INIT_TBL_WRITE_POINTER	(1 << 28)

#define CSR_DRAM_INIT_TBL_WRAP_CHECK	(1 << 27)



/*

drivers/net/wireless/iwlwifi/pcie/rx.c

+3 −2
Original line number Diff line number Diff line
@@ -1443,8 +1443,9 @@ void iwl_pcie_reset_ict(struct iwl_trans *trans) 


	val = trans_pcie->ict_tbl_dma >> ICT_SHIFT;



	val |= CSR_DRAM_INT_TBL_ENABLE;

	val |= CSR_DRAM_INIT_TBL_WRAP_CHECK;

	val |= CSR_DRAM_INT_TBL_ENABLE |

	       CSR_DRAM_INIT_TBL_WRAP_CHECK |

	       CSR_DRAM_INIT_TBL_WRITE_POINTER;



	IWL_DEBUG_ISR(trans, "CSR_DRAM_INT_TBL_REG =0x%x\n", val);