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Commit 18b81fb7 authored by Stephen Warren's avatar Stephen Warren
Browse files

ARM: tegra: set up audio clocks for tegra30 dt



Set up the audio clock tree for Tegra30 in an equivalent fashion to the
existing setup for Tegra20.

Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
Acked-by: default avatarOlof Johansson <olof@lixom.net>
parent 64376269
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+9 −0
Original line number Diff line number Diff line
@@ -57,6 +57,15 @@ struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = {
static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
	/* name		parent		rate		enabled */
	{ "uarta",	"pll_p",	408000000,	true },
	{ "pll_a",	"pll_p_out1",	564480000,	true },
	{ "pll_a_out0",	"pll_a",	11289600,	true },
	{ "extern1",	"pll_a_out0",	0,		true },
	{ "clk_out_1",	"extern1",	0,		true },
	{ "i2s0",	"pll_a_out0",	11289600,	false},
	{ "i2s1",	"pll_a_out0",	11289600,	false},
	{ "i2s2",	"pll_a_out0",	11289600,	false},
	{ "i2s3",	"pll_a_out0",	11289600,	false},
	{ "i2s4",	"pll_a_out0",	11289600,	false},
	{ NULL,		NULL,		0,		0},
};