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Commit 183ddbd6 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "clk: qcom: gcc-kona: remove FORCE_ENABLE_RCG flag from UFS clocks"

parents 1e525b68 36b72a74

drivers/clk/qcom/gcc-kona.c

+10 −8
Original line number Diff line number Diff line
@@ -1069,7 +1069,7 @@ static struct clk_rcg2 gcc_ufs_card_axi_clk_src = { 
	.parent_map = gcc_parent_map_0,

	.freq_tbl = ftbl_gcc_ufs_card_axi_clk_src,

	.enable_safe_config = true,

	.flags = FORCE_ENABLE_RCG,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "gcc_ufs_card_axi_clk_src",

		.parent_names = gcc_parent_names_0,
@@ -1100,7 +1100,7 @@ static struct clk_rcg2 gcc_ufs_card_ice_core_clk_src = { 
	.parent_map = gcc_parent_map_0,

	.freq_tbl = ftbl_gcc_ufs_card_ice_core_clk_src,

	.enable_safe_config = true,

	.flags = FORCE_ENABLE_RCG,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "gcc_ufs_card_ice_core_clk_src",

		.parent_names = gcc_parent_names_0,
@@ -1128,7 +1128,8 @@ static struct clk_rcg2 gcc_ufs_card_phy_aux_clk_src = { 
	.hid_width = 5,

	.parent_map = gcc_parent_map_3,

	.freq_tbl = ftbl_gcc_ufs_card_phy_aux_clk_src,

	.flags = FORCE_ENABLE_RCG,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "gcc_ufs_card_phy_aux_clk_src",

		.parent_names = gcc_parent_names_3,
@@ -1156,7 +1157,7 @@ static struct clk_rcg2 gcc_ufs_card_unipro_core_clk_src = { 
	.parent_map = gcc_parent_map_0,

	.freq_tbl = ftbl_gcc_ufs_card_unipro_core_clk_src,

	.enable_safe_config = true,

	.flags = FORCE_ENABLE_RCG,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "gcc_ufs_card_unipro_core_clk_src",

		.parent_names = gcc_parent_names_0,
@@ -1188,7 +1189,7 @@ static struct clk_rcg2 gcc_ufs_phy_axi_clk_src = { 
	.parent_map = gcc_parent_map_0,

	.freq_tbl = ftbl_gcc_ufs_phy_axi_clk_src,

	.enable_safe_config = true,

	.flags = FORCE_ENABLE_RCG,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "gcc_ufs_phy_axi_clk_src",

		.parent_names = gcc_parent_names_0,
@@ -1212,7 +1213,7 @@ static struct clk_rcg2 gcc_ufs_phy_ice_core_clk_src = { 
	.parent_map = gcc_parent_map_0,

	.freq_tbl = ftbl_gcc_ufs_card_ice_core_clk_src,

	.enable_safe_config = true,

	.flags = FORCE_ENABLE_RCG,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "gcc_ufs_phy_ice_core_clk_src",

		.parent_names = gcc_parent_names_0,
@@ -1235,7 +1236,8 @@ static struct clk_rcg2 gcc_ufs_phy_phy_aux_clk_src = { 
	.hid_width = 5,

	.parent_map = gcc_parent_map_3,

	.freq_tbl = ftbl_gcc_pcie_0_aux_clk_src,

	.flags = FORCE_ENABLE_RCG,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "gcc_ufs_phy_phy_aux_clk_src",

		.parent_names = gcc_parent_names_3,
@@ -1256,7 +1258,7 @@ static struct clk_rcg2 gcc_ufs_phy_unipro_core_clk_src = { 
	.parent_map = gcc_parent_map_0,

	.freq_tbl = ftbl_gcc_ufs_card_ice_core_clk_src,

	.enable_safe_config = true,

	.flags = FORCE_ENABLE_RCG,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "gcc_ufs_phy_unipro_core_clk_src",

		.parent_names = gcc_parent_names_0,