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Commit 17f085df authored by Bruce Allan's avatar Bruce Allan Committed by David S. Miller
Browse files

e1000e: disable gig speed when in S0->Sx transition 



Most of this workaround is necessary for all ICHx/PCH parts so one of
the two MAC-type checks can be removed.

Signed-off-by: default avatarBruce Allan <bruce.w.allan@intel.com>
Tested-by: default avatarJeff Pieper <jeffrey.e.pieper@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent dbcb9fec

drivers/net/e1000e/ich8lan.c

+5 −14
Original line number Diff line number Diff line
@@ -3457,21 +3457,12 @@ void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw) 
{

	u32 phy_ctrl;



	switch (hw->mac.type) {

	case e1000_ich8lan:

	case e1000_ich9lan:

	case e1000_ich10lan:

	case e1000_pchlan:

	phy_ctrl = er32(PHY_CTRL);

		phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU |

		            E1000_PHY_CTRL_GBE_DISABLE;

	phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU | E1000_PHY_CTRL_GBE_DISABLE;

	ew32(PHY_CTRL, phy_ctrl);



		if (hw->mac.type == e1000_pchlan)

	if (hw->mac.type >= e1000_pchlan)

		e1000_phy_hw_reset_ich8lan(hw);

	default:

		break;

	}

}



/**