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Commit 177aa53a authored by Ivan Safonov's avatar Ivan Safonov Committed by Greg Kroah-Hartman
Browse files

staging: r8188eu: remove GET_HAL_DATA macro 



GET_HAL_DATA replaced by its definition.

Signed-off-by: default avatarIvan Safonov <insafonov@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent bc15ada3

drivers/staging/rtl8188eu/core/rtw_sreset.c

+3 −6
Original line number Diff line number Diff line
@@ -18,16 +18,14 @@ 


void rtw_hal_sreset_init(struct adapter *padapter)

{

	struct hal_data_8188e	*pHalData = GET_HAL_DATA(padapter);

	struct sreset_priv *psrtpriv = &pHalData->srestpriv;

	struct sreset_priv *psrtpriv = &padapter->HalData->srestpriv;



	psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;

}



u8 sreset_get_wifi_status(struct adapter *padapter)

{

	struct hal_data_8188e	*pHalData = GET_HAL_DATA(padapter);

	struct sreset_priv *psrtpriv = &pHalData->srestpriv;

	struct sreset_priv *psrtpriv = &padapter->HalData->srestpriv;



	u8 status = WIFI_STATUS_SUCCESS;

	u32 val32 = 0;
@@ -54,6 +52,5 @@ u8 sreset_get_wifi_status(struct adapter *padapter) 


void sreset_set_wifi_error_status(struct adapter *padapter, u32 status)

{

	struct hal_data_8188e	*pHalData = GET_HAL_DATA(padapter);

	pHalData->srestpriv.Wifi_Error_Status = status;

	padapter->HalData->srestpriv.Wifi_Error_Status = status;

}

drivers/staging/rtl8188eu/hal/bb_cfg.c

+5 −8
Original line number Diff line number Diff line
@@ -498,7 +498,7 @@ static u32 array_phy_reg_pg_8188e[] = { 
static void store_pwrindex_offset(struct adapter *adapter,

				  u32 regaddr, u32 bitmask, u32 data)

{

	struct hal_data_8188e *hal_data = GET_HAL_DATA(adapter);

	struct hal_data_8188e *hal_data = adapter->HalData;

	u32 * const power_level_offset =

		hal_data->MCSTxPowerLevelOriginalOffset[hal_data->pwrGroupCnt];
@@ -588,11 +588,10 @@ static bool config_bb_with_pgheader(struct adapter *adapt) 


static void rtl88e_phy_init_bb_rf_register_definition(struct adapter *adapter)

{

	struct hal_data_8188e		*hal_data = GET_HAL_DATA(adapter);

	struct bb_reg_def               *reg[4];



	reg[RF_PATH_A] = &hal_data->PHYRegDef[RF_PATH_A];

	reg[RF_PATH_B] = &hal_data->PHYRegDef[RF_PATH_B];

	reg[RF_PATH_A] = &adapter->HalData->PHYRegDef[RF_PATH_A];

	reg[RF_PATH_B] = &adapter->HalData->PHYRegDef[RF_PATH_B];



	reg[RF_PATH_A]->rfintfs = rFPGA0_XAB_RFInterfaceSW;

	reg[RF_PATH_B]->rfintfs = rFPGA0_XAB_RFInterfaceSW;
@@ -652,13 +651,12 @@ static void rtl88e_phy_init_bb_rf_register_definition(struct adapter *adapter) 
static bool config_parafile(struct adapter *adapt)

{

	struct eeprom_priv *eeprom = GET_EEPROM_EFUSE_PRIV(adapt);

	struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);



	set_baseband_phy_config(adapt);



	/* If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt */

	if (!eeprom->bautoload_fail_flag) {

		hal_data->pwrGroupCnt = 0;

		adapt->HalData->pwrGroupCnt = 0;

		config_bb_with_pgheader(adapt);

	}

	set_baseband_agc_config(adapt);
@@ -668,7 +666,6 @@ static bool config_parafile(struct adapter *adapt) 
bool rtl88eu_phy_bb_config(struct adapter *adapt)

{

	int rtstatus = true;

	struct hal_data_8188e	*hal_data = GET_HAL_DATA(adapt);

	u32 regval;

	u8 crystal_cap;
@@ -688,7 +685,7 @@ bool rtl88eu_phy_bb_config(struct adapter *adapt) 
	rtstatus = config_parafile(adapt);



	/*  write 0x24[16:11] = 0x24[22:17] = crystal_cap */

	crystal_cap = hal_data->CrystalCap & 0x3F;

	crystal_cap = adapt->HalData->CrystalCap & 0x3F;

	phy_set_bb_reg(adapt, REG_AFE_XTAL_CTRL, 0x7ff800,

		       (crystal_cap | (crystal_cap << 6)));

drivers/staging/rtl8188eu/hal/odm.c

+7 −10
Original line number Diff line number Diff line
@@ -912,8 +912,7 @@ bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s32 RSSI, bool bForceUpdate 
void odm_DynamicTxPowerInit(struct odm_dm_struct *pDM_Odm)

{

	struct adapter *Adapter = pDM_Odm->Adapter;

	struct hal_data_8188e	*pHalData = GET_HAL_DATA(Adapter);

	struct dm_priv	*pdmpriv = &pHalData->dmpriv;

	struct dm_priv	*pdmpriv = &Adapter->HalData->dmpriv;

	pdmpriv->bDynamicTxPowerEnable = false;

	pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal;

	pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal;
@@ -938,8 +937,7 @@ void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm) 


static void FindMinimumRSSI(struct adapter *pAdapter)

{

	struct hal_data_8188e	*pHalData = GET_HAL_DATA(pAdapter);

	struct dm_priv	*pdmpriv = &pHalData->dmpriv;

	struct dm_priv	*pdmpriv = &pAdapter->HalData->dmpriv;



	/* 1 1.Unconditionally set RSSI */

	pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB;
@@ -948,8 +946,7 @@ static void FindMinimumRSSI(struct adapter *pAdapter) 
void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm)

{

	struct adapter *Adapter = pDM_Odm->Adapter;

	struct hal_data_8188e	*pHalData = GET_HAL_DATA(Adapter);

	struct dm_priv	*pdmpriv = &pHalData->dmpriv;

	struct dm_priv	*pdmpriv = &Adapter->HalData->dmpriv;

	int	i;

	int	tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff;

	u8	sta_cnt = 0;
@@ -978,7 +975,7 @@ void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm) 


	for (i = 0; i < sta_cnt; i++) {

		if (PWDB_rssi[i] != 0) {

			ODM_RA_SetRSSI_8188E(&pHalData->odmpriv,

			ODM_RA_SetRSSI_8188E(&Adapter->HalData->odmpriv,

					     PWDB_rssi[i] & 0xFF,

					     (PWDB_rssi[i] >> 16) & 0xFF);

		}
@@ -995,7 +992,7 @@ void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm) 
		pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0;



	FindMinimumRSSI(Adapter);

	pHalData->odmpriv.RSSI_Min = pdmpriv->MinUndecoratedPWDBForDM;

	Adapter->HalData->odmpriv.RSSI_Min = pdmpriv->MinUndecoratedPWDBForDM;

}



/* 3============================================================ */
@@ -1105,7 +1102,6 @@ void odm_EdcaTurboCheckCE(struct odm_dm_struct *pDM_Odm) 
	u64	cur_tx_bytes = 0;

	u64	cur_rx_bytes = 0;

	u8	bbtchange = false;

	struct hal_data_8188e		*pHalData = GET_HAL_DATA(Adapter);

	struct xmit_priv		*pxmitpriv = &(Adapter->xmitpriv);

	struct recv_priv		*precvpriv = &(Adapter->recvpriv);

	struct registry_priv	*pregpriv = &Adapter->registrypriv;
@@ -1159,7 +1155,8 @@ void odm_EdcaTurboCheckCE(struct odm_dm_struct *pDM_Odm) 
		/*  Turn Off EDCA turbo here. */

		/*  Restore original EDCA according to the declaration of AP. */

		 if (pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) {

			usb_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE);

			usb_write32(Adapter, REG_EDCA_BE_PARAM,

				    Adapter->HalData->AcParam_BE);

			pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false;

		}

	}

drivers/staging/rtl8188eu/hal/phy.c

+16 −24
Original line number Diff line number Diff line
@@ -65,8 +65,7 @@ static u32 rf_serial_read(struct adapter *adapt, 
			enum rf_radio_path rfpath, u32 offset)

{

	u32 ret = 0;

	struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);

	struct bb_reg_def *phyreg = &hal_data->PHYRegDef[rfpath];

	struct bb_reg_def *phyreg = &adapt->HalData->PHYRegDef[rfpath];

	u32 tmplong, tmplong2;

	u8 rfpi_enable = 0;
@@ -110,8 +109,7 @@ static void rf_serial_write(struct adapter *adapt, 
			    u32 data)

{

	u32 data_and_addr = 0;

	struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);

	struct bb_reg_def *phyreg = &hal_data->PHYRegDef[rfpath];

	struct bb_reg_def *phyreg = &adapt->HalData->PHYRegDef[rfpath];



	offset &= 0xff;

	data_and_addr = ((offset<<20) | (data&0x000fffff)) & 0x0fffffff;
@@ -147,7 +145,7 @@ void phy_set_rf_reg(struct adapter *adapt, enum rf_radio_path rf_path, 
static void get_tx_power_index(struct adapter *adapt, u8 channel, u8 *cck_pwr,

			       u8 *ofdm_pwr, u8 *bw20_pwr, u8 *bw40_pwr)

{

	struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);

	struct hal_data_8188e *hal_data = adapt->HalData;

	u8 index = (channel - 1);

	u8 TxCount = 0, path_nums;
@@ -183,7 +181,7 @@ static void phy_power_index_check(struct adapter *adapt, u8 channel, 
				  u8 *cck_pwr, u8 *ofdm_pwr, u8 *bw20_pwr,

				  u8 *bw40_pwr)

{

	struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);

	struct hal_data_8188e *hal_data = adapt->HalData;



	hal_data->CurrentCckTxPwrIdx = cck_pwr[0];

	hal_data->CurrentOfdm24GTxPwrIdx = ofdm_pwr[0];
@@ -211,7 +209,7 @@ void phy_set_tx_power_level(struct adapter *adapt, u8 channel) 


static void phy_set_bw_mode_callback(struct adapter *adapt)

{

	struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);

	struct hal_data_8188e *hal_data = adapt->HalData;

	u8 reg_bw_opmode;

	u8 reg_prsr_rsc;
@@ -277,7 +275,7 @@ static void phy_set_bw_mode_callback(struct adapter *adapt) 
void rtw_hal_set_bwmode(struct adapter *adapt, enum ht_channel_width bandwidth,

		     unsigned char offset)

{

	struct hal_data_8188e	*hal_data = GET_HAL_DATA(adapt);

	struct hal_data_8188e *hal_data = adapt->HalData;

	enum ht_channel_width tmp_bw = hal_data->CurrentChannelBW;



	hal_data->CurrentChannelBW = bandwidth;
@@ -293,7 +291,7 @@ static void phy_sw_chnl_callback(struct adapter *adapt, u8 channel) 
{

	u8 rf_path;

	u32 param1, param2;

	struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);

	struct hal_data_8188e *hal_data = adapt->HalData;



	phy_set_tx_power_level(adapt, channel);
@@ -309,7 +307,7 @@ static void phy_sw_chnl_callback(struct adapter *adapt, u8 channel) 


void rtw_hal_set_chan(struct adapter *adapt, u8 channel)

{

	struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);

	struct hal_data_8188e *hal_data = adapt->HalData;

	u8 tmpchannel = hal_data->CurrentChannel;



	if (hal_data->rf_chip == RF_PSEUDO_11N)
@@ -404,7 +402,7 @@ static void dm_txpwr_track_setpwr(struct odm_dm_struct *dm_odm) 


void rtl88eu_dm_txpower_tracking_callback_thermalmeter(struct adapter *adapt)

{

	struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);

	struct hal_data_8188e *hal_data = adapt->HalData;

	u8 thermal_val = 0, delta, delta_lck, delta_iqk, offset;

	u8 thermal_avg_count = 0;

	u32 thermal_avg = 0;
@@ -629,8 +627,7 @@ static u8 phy_path_a_rx_iqk(struct adapter *adapt, bool configPathB) 
{

	u32 reg_eac, reg_e94, reg_e9c, reg_ea4, u4tmp;

	u8 result = 0x00;

	struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);

	struct odm_dm_struct *dm_odm = &hal_data->odmpriv;

	struct odm_dm_struct *dm_odm = &adapt->HalData->odmpriv;



	/* 1 Get TXIMR setting */

	/* modify RXIQK mode table */
@@ -734,8 +731,7 @@ static u8 phy_path_b_iqk(struct adapter *adapt) 
{

	u32 regeac, regeb4, regebc, regec4, regecc;

	u8 result = 0x00;

	struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);

	struct odm_dm_struct *dm_odm = &hal_data->odmpriv;

	struct odm_dm_struct *dm_odm = &adapt->HalData->odmpriv;



	/* One shot, path B LOK & IQK */

	phy_set_bb_reg(adapt, rIQK_AGC_Cont, bMaskDWord, 0x00000002);
@@ -951,8 +947,7 @@ static bool simularity_compare(struct adapter *adapt, s32 resulta[][8], 
			       u8 c1, u8 c2)

{

	u32 i, j, diff, sim_bitmap = 0, bound;

	struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);

	struct odm_dm_struct *dm_odm = &hal_data->odmpriv;

	struct odm_dm_struct *dm_odm = &adapt->HalData->odmpriv;

	u8 final_candidate[2] = {0xFF, 0xFF};	/* for path A and path B */

	bool result = true;

	s32 tmp1 = 0, tmp2 = 0;
@@ -1030,8 +1025,7 @@ static bool simularity_compare(struct adapter *adapt, s32 resulta[][8], 
static void phy_iq_calibrate(struct adapter *adapt, s32 result[][8],

			     u8 t, bool is2t)

{

	struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);

	struct odm_dm_struct *dm_odm = &hal_data->odmpriv;

	struct odm_dm_struct *dm_odm = &adapt->HalData->odmpriv;

	u32 i;

	u8 path_a_ok, path_b_ok;

	u32 adda_reg[IQK_ADDA_REG_NUM] = {
@@ -1276,8 +1270,7 @@ static void phy_lc_calibrate(struct adapter *adapt, bool is2t) 


void rtl88eu_phy_iq_calibrate(struct adapter *adapt, bool recovery)

{

	struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);

	struct odm_dm_struct *dm_odm = &hal_data->odmpriv;

	struct odm_dm_struct *dm_odm = &adapt->HalData->odmpriv;

	s32 result[4][8];

	u8 i, final, chn_index;

	bool pathaok, pathbok;
@@ -1388,7 +1381,7 @@ void rtl88eu_phy_iq_calibrate(struct adapter *adapt, bool recovery) 
				       (reg_ec4 == 0));

	}



	chn_index = get_right_chnl_for_iqk(hal_data->CurrentChannel);

	chn_index = get_right_chnl_for_iqk(adapt->HalData->CurrentChannel);



	if (final < 4) {

		for (i = 0; i < IQK_Matrix_REG_NUM; i++)
@@ -1404,8 +1397,7 @@ void rtl88eu_phy_lc_calibrate(struct adapter *adapt) 
{

	bool singletone = false, carrier_sup = false;

	u32 timeout = 2000, timecount = 0;

	struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);

	struct odm_dm_struct *dm_odm = &hal_data->odmpriv;

	struct odm_dm_struct *dm_odm = &adapt->HalData->odmpriv;



	if (!(dm_odm->SupportAbility & ODM_RF_CALIBRATION))

		return;

drivers/staging/rtl8188eu/hal/rf.c

+7 −9
Original line number Diff line number Diff line
@@ -22,7 +22,7 @@ 
void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt,

				      enum ht_channel_width bandwidth)

{

	struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);

	struct hal_data_8188e *hal_data = adapt->HalData;



	switch (bandwidth) {

	case HT_CHANNEL_WIDTH_20:
@@ -44,7 +44,7 @@ void rtl88eu_phy_rf6052_set_bandwidth(struct adapter *adapt, 


void rtl88eu_phy_rf6052_set_cck_txpower(struct adapter *adapt, u8 *powerlevel)

{

	struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);

	struct hal_data_8188e *hal_data = adapt->HalData;

	struct dm_priv *pdmpriv = &hal_data->dmpriv;

	struct mlme_ext_priv *pmlmeext = &adapt->mlmeextpriv;

	u32 tx_agc[2] = {0, 0}, tmpval = 0, pwrtrac_value;
@@ -129,7 +129,6 @@ static void getpowerbase88e(struct adapter *adapt, u8 *pwr_level_ofdm, 
			    u8 *pwr_level_bw20, u8 *pwr_level_bw40,

			    u8 channel, u32 *ofdmbase, u32 *mcs_base)

{

	struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);

	u32 powerbase0, powerbase1;

	u8 i, powerlevel[2];
@@ -140,9 +139,9 @@ static void getpowerbase88e(struct adapter *adapt, u8 *pwr_level_ofdm, 
			     (powerbase0<<8) | powerbase0;

		*(ofdmbase+i) = powerbase0;

	}

	for (i = 0; i < hal_data->NumTotalRFPath; i++) {

	for (i = 0; i < adapt->HalData->NumTotalRFPath; i++) {

		/* Check HT20 to HT40 diff */

		if (hal_data->CurrentChannelBW == HT_CHANNEL_WIDTH_20)

		if (adapt->HalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20)

			powerlevel[i] = pwr_level_bw20[i];

		else

			powerlevel[i] = pwr_level_bw40[i];
@@ -156,7 +155,7 @@ static void get_rx_power_val_by_reg(struct adapter *adapt, u8 channel, 
				    u8 index, u32 *powerbase0, u32 *powerbase1,

				    u32 *out_val)

{

	struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);

	struct hal_data_8188e *hal_data = adapt->HalData;

	struct dm_priv	*pdmpriv = &hal_data->dmpriv;

	u8 i, chnlGroup = 0, pwr_diff_limit[4], customer_pwr_limit;

	s8 pwr_diff = 0;
@@ -286,7 +285,6 @@ void rtl88eu_phy_rf6052_set_ofdm_txpower(struct adapter *adapt, 
					 u8 *pwr_level_bw20,

					 u8 *pwr_level_bw40, u8 channel)

{

	struct hal_data_8188e *hal_data = GET_HAL_DATA(adapt);

	u32 write_val[2], powerbase0[2], powerbase1[2], pwrtrac_value;

	u8 direction;

	u8 index = 0;
@@ -294,8 +292,8 @@ void rtl88eu_phy_rf6052_set_ofdm_txpower(struct adapter *adapt, 
	getpowerbase88e(adapt, pwr_level_ofdm, pwr_level_bw20, pwr_level_bw40,

			channel, &powerbase0[0], &powerbase1[0]);



	rtl88eu_dm_txpower_track_adjust(&hal_data->odmpriv, 0, &direction,

					&pwrtrac_value);

	rtl88eu_dm_txpower_track_adjust(&adapt->HalData->odmpriv, 0,

					&direction, &pwrtrac_value);



	for (index = 0; index < 6; index++) {

		get_rx_power_val_by_reg(adapt, channel, index,