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Unverified Commit 1761ad8c authored by Paul Cercueil's avatar Paul Cercueil Committed by James Hogan
Browse files

MIPS: JZ4740: Drop old platform reset code 



This work is now performed by the watchdog driver directly.

Signed-off-by: default avatarPaul Cercueil <paul@crapouillou.net>
Acked-by: default avatarJames Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Wim Van Sebroeck <wim@linux-watchdog.org>
Cc: Mathieu Malaterre <malat@debian.org>
Cc: linux-mips@linux-mips.org
Cc: linux-watchdog@vger.kernel.org
Signed-off-by: default avatarJames Hogan <jhogan@kernel.org>
parent c49173ff

arch/mips/jz4740/reset.c

+0 −31
Original line number Diff line number Diff line
@@ -12,18 +12,9 @@ 
 *

 */



#include <linux/clk.h>

#include <linux/io.h>

#include <linux/kernel.h>

#include <linux/pm.h>



#include <asm/reboot.h>



#include <asm/mach-jz4740/base.h>

#include <asm/mach-jz4740/timer.h>



#include "reset.h"

#include "clock.h"



static void jz4740_halt(void)

{
@@ -36,29 +27,7 @@ static void jz4740_halt(void) 
	}

}



#define JZ_REG_WDT_DATA 0x00

#define JZ_REG_WDT_COUNTER_ENABLE 0x04

#define JZ_REG_WDT_COUNTER 0x08

#define JZ_REG_WDT_CTRL 0x0c



static void jz4740_restart(char *command)

{

	void __iomem *wdt_base = ioremap(JZ4740_WDT_BASE_ADDR, 0x0f);



	jz4740_timer_enable_watchdog();



	writeb(0, wdt_base + JZ_REG_WDT_COUNTER_ENABLE);



	writew(0, wdt_base + JZ_REG_WDT_COUNTER);

	writew(0, wdt_base + JZ_REG_WDT_DATA);

	writew(BIT(2), wdt_base + JZ_REG_WDT_CTRL);



	writeb(1, wdt_base + JZ_REG_WDT_COUNTER_ENABLE);

	jz4740_halt();

}



void jz4740_reset_init(void)

{

	_machine_restart = jz4740_restart;

	_machine_halt = jz4740_halt;

}