Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1685ddbe authored by Steven J. Hill's avatar Steven J. Hill Committed by Ralf Baechle
Browse files

MIPS: Octeon: Changes to support readq()/writeq() usage. 



Update OCTEON port mangling code to support readq() and
writeq() functions to allow driver code to be more portable.
Updates also for word and long function pairs. We also
remove SWAP_IO_SPACE for OCTEON platforms as the function
macros are redundant with the new mangling code.

Signed-off-by: default avatarSteven J. Hill <steven.hill@cavium.com>
Acked-by: default avatarDavid Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13780/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent acd168c0

arch/mips/Kconfig

+0 −1
Original line number Diff line number Diff line
@@ -880,7 +880,6 @@ config CAVIUM_OCTEON_SOC 
	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN

	select SYS_HAS_EARLY_PRINTK

	select SYS_HAS_CPU_CAVIUM_OCTEON

	select SWAP_IO_SPACE

	select HW_HAS_PCI

	select ZONE_DMA32

	select HOLES_IN_ZONE

arch/mips/cavium-octeon/setup.c

+19 −1
Original line number Diff line number Diff line
@@ -40,9 +40,27 @@ 


#include <asm/octeon/octeon.h>

#include <asm/octeon/pci-octeon.h>

#include <asm/octeon/cvmx-mio-defs.h>

#include <asm/octeon/cvmx-rst-defs.h>



/*

 * TRUE for devices having registers with little-endian byte

 * order, FALSE for registers with native-endian byte order.

 * PCI mandates little-endian, USB and SATA are configuraable,

 * but we chose little-endian for these.

 */

const bool octeon_should_swizzle_table[256] = {

	[0x00] = true,	/* bootbus/CF */

	[0x1b] = true,	/* PCI mmio window */

	[0x1c] = true,	/* PCI mmio window */

	[0x1d] = true,	/* PCI mmio window */

	[0x1e] = true,	/* PCI mmio window */

	[0x68] = true,	/* OCTEON III USB */

	[0x69] = true,	/* OCTEON III USB */

	[0x6c] = true,	/* OCTEON III SATA */

	[0x6f] = true,	/* OCTEON II USB */

};

EXPORT_SYMBOL(octeon_should_swizzle_table);



#ifdef CONFIG_PCI

extern void pci_console_init(const char *arg);

#endif

arch/mips/include/asm/mach-cavium-octeon/mangle-port.h

+13 −29
Original line number Diff line number Diff line
@@ -12,6 +12,14 @@ 


#ifdef __BIG_ENDIAN



static inline bool __should_swizzle_bits(volatile void *a)

{

	extern const bool octeon_should_swizzle_table[];



	unsigned long did = ((unsigned long)a >> 40) & 0xff;

	return octeon_should_swizzle_table[did];

}



# define __swizzle_addr_b(port)	(port)

# define __swizzle_addr_w(port)	(port)

# define __swizzle_addr_l(port)	(port)
@@ -19,6 +27,8 @@ 


#else /* __LITTLE_ENDIAN */



#define __should_swizzle_bits(a)	false



static inline bool __should_swizzle_addr(unsigned long p)

{

	/* boot bus? */
@@ -35,40 +45,14 @@ static inline bool __should_swizzle_addr(unsigned long p) 


#endif /* __BIG_ENDIAN */



/*

 * Sane hardware offers swapping of PCI/ISA I/O space accesses in hardware;

 * less sane hardware forces software to fiddle with this...

 *

 * Regardless, if the host bus endianness mismatches that of PCI/ISA, then

 * you can't have the numerical value of data and byte addresses within

 * multibyte quantities both preserved at the same time.  Hence two

 * variations of functions: non-prefixed ones that preserve the value

 * and prefixed ones that preserve byte addresses.  The latters are

 * typically used for moving raw data between a peripheral and memory (cf.

 * string I/O functions), hence the "__mem_" prefix.

 */

#if defined(CONFIG_SWAP_IO_SPACE)



# define ioswabb(a, x)		(x)

# define __mem_ioswabb(a, x)	(x)

# define ioswabw(a, x)		le16_to_cpu(x)

# define ioswabw(a, x)		(__should_swizzle_bits(a) ? le16_to_cpu(x) : x)

# define __mem_ioswabw(a, x)	(x)

# define ioswabl(a, x)		le32_to_cpu(x)

# define ioswabl(a, x)		(__should_swizzle_bits(a) ? le32_to_cpu(x) : x)

# define __mem_ioswabl(a, x)	(x)

# define ioswabq(a, x)		le64_to_cpu(x)

# define ioswabq(a, x)		(__should_swizzle_bits(a) ? le64_to_cpu(x) : x)

# define __mem_ioswabq(a, x)	(x)



#else



# define ioswabb(a, x)		(x)

# define __mem_ioswabb(a, x)	(x)

# define ioswabw(a, x)		(x)

# define __mem_ioswabw(a, x)	cpu_to_le16(x)

# define ioswabl(a, x)		(x)

# define __mem_ioswabl(a, x)	cpu_to_le32(x)

# define ioswabq(a, x)		(x)

# define __mem_ioswabq(a, x)	cpu_to_le32(x)



#endif



#endif /* __ASM_MACH_GENERIC_MANGLE_PORT_H */