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Commit 15c825d0 authored by Meng Wang's avatar Meng Wang Committed by Gerrit - the friendly Code Review server
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ASoC: codec: Update codec driver to component driver 



Some alsa API are removed in kernel-4.19 which would cause
codec driver compile failure. Update codec driver to fix it.

Change-Id: Ie358ec1863082166958059c179300b453d2a03ad
Signed-off-by: default avatarMeng Wang <mengw@codeaurora.org>
parent ee084a06

asoc/codecs/aqt1000/aqt1000-api.h

+5 −4
Original line number Diff line number Diff line
@@ -10,11 +10,12 @@ 
#include <linux/of_device.h>

#include <sound/soc.h>



extern int aqt_mbhc_micb_adjust_voltage(struct snd_soc_codec *codec,

extern int aqt_mbhc_micb_adjust_voltage(struct snd_soc_component *component,

					int volt, int micb_num);

extern int aqt_cdc_mclk_enable(struct snd_soc_codec *codec, bool enable);

extern int aqt_cdc_mclk_enable(struct snd_soc_component *component,

			       bool enable);

extern int aqt_get_micb_vout_ctl_val(u32 micb_mv);

extern int aqt_micbias_control(struct snd_soc_codec *codec, int micb_num,

			       int req, bool is_dapm);

extern int aqt_micbias_control(struct snd_soc_component *component,

			       int micb_num, int req, bool is_dapm);



#endif /* AQT1000_API_H */

asoc/codecs/aqt1000/aqt1000-clsh.c

+212 −176
Original line number Diff line number Diff line
@@ -136,7 +136,7 @@ static const struct aqt_imped_val imped_index[] = { 
	{13, 9},

};



static void (*clsh_state_fp[NUM_CLSH_STATES])(struct snd_soc_codec *,

static void (*clsh_state_fp[NUM_CLSH_STATES])(struct snd_soc_component *,

					      struct aqt_clsh_cdc_data *,

					      u8 req_state, bool en, int mode);
@@ -169,12 +169,13 @@ static int get_impedance_index(int imped) 


/*

 * Function: aqt_clsh_imped_config

 * Params: codec, imped, reset

 * Params: component, imped, reset

 * Description:

 * This function updates HPHL and HPHR gain settings

 * according to the impedance value.

 */

void aqt_clsh_imped_config(struct snd_soc_codec *codec, int imped, bool reset)

void aqt_clsh_imped_config(struct snd_soc_component *component,

			   int imped, bool reset)

{

	int i;

	int index = 0;
@@ -189,7 +190,7 @@ void aqt_clsh_imped_config(struct snd_soc_codec *codec, int imped, bool reset) 
	/* reset = 1, which means request is to reset the register values */

	if (reset) {

		for (i = 0; i < MAX_IMPED_PARAMS; i++)

			snd_soc_update_bits(codec,

			snd_soc_component_update_bits(component,

				imped_table_ptr[index][i].reg,

				imped_table_ptr[index][i].mask, 0);

		return;
@@ -205,7 +206,7 @@ void aqt_clsh_imped_config(struct snd_soc_codec *codec, int imped, bool reset) 
		return;

	}

	for (i = 0; i < MAX_IMPED_PARAMS; i++)

		snd_soc_update_bits(codec,

		snd_soc_component_update_bits(component,

				imped_table_ptr[index][i].reg,

				imped_table_ptr[index][i].mask,

				imped_table_ptr[index][i].val);
@@ -242,22 +243,23 @@ static const char *const state_to_str[] = { 
};



static inline void

aqt_enable_clsh_block(struct snd_soc_codec *codec,

aqt_enable_clsh_block(struct snd_soc_component *component,

		      struct aqt_clsh_cdc_data *clsh_d, bool enable)

{

	if ((enable && ++clsh_d->clsh_users == 1) ||

	    (!enable && --clsh_d->clsh_users == 0))

		snd_soc_update_bits(codec, AQT1000_CDC_CLSH_CRC, 0x01,

				    (u8) enable);

		snd_soc_component_update_bits(component, AQT1000_CDC_CLSH_CRC,

				0x01, (u8) enable);

	if (clsh_d->clsh_users < 0)

		clsh_d->clsh_users = 0;

	dev_dbg(codec->dev, "%s: clsh_users %d, enable %d", __func__,

	dev_dbg(component->dev, "%s: clsh_users %d, enable %d", __func__,

		clsh_d->clsh_users, enable);

}



static inline bool aqt_clsh_enable_status(struct snd_soc_codec *codec)

static inline bool aqt_clsh_enable_status(struct snd_soc_component *component)

{

	return snd_soc_read(codec, AQT1000_CDC_CLSH_CRC) & 0x01;

	return snd_soc_component_read32(

			component, AQT1000_CDC_CLSH_CRC) & 0x01;

}



static inline int aqt_clsh_get_int_mode(struct aqt_clsh_cdc_data *clsh_d,
@@ -284,87 +286,106 @@ static inline void aqt_clsh_set_int_mode(struct aqt_clsh_cdc_data *clsh_d, 
	clsh_d->interpolator_modes[ffs(clsh_state)] = mode;

}



static inline void aqt_clsh_set_buck_mode(struct snd_soc_codec *codec,

static inline void aqt_clsh_set_buck_mode(struct snd_soc_component *component,

					  int mode)

{

	if (mode == CLS_H_HIFI || mode == CLS_H_LOHIFI ||

	    mode == CLS_AB_HIFI || mode == CLS_AB)

		snd_soc_update_bits(codec, AQT1000_ANA_RX_SUPPLIES,

		snd_soc_component_update_bits(component,

				AQT1000_ANA_RX_SUPPLIES,

				0x08, 0x08); /* set to HIFI */

	else

		snd_soc_update_bits(codec, AQT1000_ANA_RX_SUPPLIES,

		snd_soc_component_update_bits(component,

				AQT1000_ANA_RX_SUPPLIES,

				0x08, 0x00); /* set to default */

}



static inline void aqt_clsh_set_flyback_mode(struct snd_soc_codec *codec,

					     int mode)

static inline void aqt_clsh_set_flyback_mode(

			struct snd_soc_component *component, int mode)

{

	if (mode == CLS_H_HIFI || mode == CLS_H_LOHIFI ||

	    mode == CLS_AB_HIFI || mode == CLS_AB)

		snd_soc_update_bits(codec, AQT1000_ANA_RX_SUPPLIES,

		snd_soc_component_update_bits(component,

				AQT1000_ANA_RX_SUPPLIES,

				0x04, 0x04); /* set to HIFI */

	else

		snd_soc_update_bits(codec, AQT1000_ANA_RX_SUPPLIES,

		snd_soc_component_update_bits(component,

				AQT1000_ANA_RX_SUPPLIES,

				0x04, 0x00); /* set to Default */

}



static inline void aqt_clsh_gm3_boost_disable(struct snd_soc_codec *codec,

					      int mode)

static inline void aqt_clsh_gm3_boost_disable(

			struct snd_soc_component *component, int mode)

{

	if (mode == CLS_H_HIFI || mode == CLS_H_LOHIFI ||

	    mode == CLS_AB_HIFI || mode == CLS_AB) {

		snd_soc_update_bits(codec, AQT1000_HPH_CNP_WG_CTL,

		snd_soc_component_update_bits(component,

				AQT1000_HPH_CNP_WG_CTL,

				0x80, 0x0); /* disable GM3 Boost */

		snd_soc_update_bits(codec, AQT1000_FLYBACK_VNEG_CTRL_4,

		snd_soc_component_update_bits(component,

				AQT1000_FLYBACK_VNEG_CTRL_4,

				0xF0, 0x80);

	} else {

		snd_soc_update_bits(codec, AQT1000_HPH_CNP_WG_CTL,

		snd_soc_component_update_bits(component,

				AQT1000_HPH_CNP_WG_CTL,

				0x80, 0x80); /* set to Default */

		snd_soc_update_bits(codec, AQT1000_FLYBACK_VNEG_CTRL_4,

		snd_soc_component_update_bits(component,

				AQT1000_FLYBACK_VNEG_CTRL_4,

				0xF0, 0x70);

	}

}



static inline void aqt_clsh_flyback_dac_ctl(struct snd_soc_codec *codec,

					     int vref)

static inline void aqt_clsh_flyback_dac_ctl(

			struct snd_soc_component *component, int vref)

{

	snd_soc_update_bits(codec, AQT1000_FLYBACK_VNEGDAC_CTRL_2,

	snd_soc_component_update_bits(component,

			AQT1000_FLYBACK_VNEGDAC_CTRL_2,

			0xE0, (vref << 5));

}



static inline void aqt_clsh_mode_vref_ctl(struct snd_soc_codec *codec,

static inline void aqt_clsh_mode_vref_ctl(struct snd_soc_component *component,

					  int vref_ctl)

{

	if (vref_ctl == I2C) {

		snd_soc_update_bits(codec, AQT1000_CLASSH_MODE_3, 0x02, 0x02);

		snd_soc_update_bits(codec, AQT1000_CLASSH_MODE_2, 0xFF, 0x1C);

		snd_soc_component_update_bits(component, AQT1000_CLASSH_MODE_3,

					      0x02, 0x02);

		snd_soc_component_update_bits(component, AQT1000_CLASSH_MODE_2,

					      0xFF, 0x1C);

	} else {

		snd_soc_update_bits(codec, AQT1000_CLASSH_MODE_2, 0xFF, 0x3A);

		snd_soc_update_bits(codec, AQT1000_CLASSH_MODE_3, 0x02, 0x00);

		snd_soc_component_update_bits(component, AQT1000_CLASSH_MODE_2,

					      0xFF, 0x3A);

		snd_soc_component_update_bits(component, AQT1000_CLASSH_MODE_3,

					      0x02, 0x00);

	}

}



static inline void aqt_clsh_buck_current_bias_ctl(struct snd_soc_codec *codec,

						  bool enable)

static inline void aqt_clsh_buck_current_bias_ctl(

			struct snd_soc_component *component, bool enable)

{

	if (enable) {

		snd_soc_update_bits(codec, AQT1000_BUCK_5V_IBIAS_CTL_4,

		snd_soc_component_update_bits(component,

				AQT1000_BUCK_5V_IBIAS_CTL_4,

				0x70, (I_2UA << 4));

		snd_soc_update_bits(codec, AQT1000_BUCK_5V_IBIAS_CTL_4,

		snd_soc_component_update_bits(component,

				AQT1000_BUCK_5V_IBIAS_CTL_4,

				0x07, I_0P25UA);

		snd_soc_update_bits(codec, AQT1000_BUCK_5V_CTRL_CCL_2,

		snd_soc_component_update_bits(component,

				AQT1000_BUCK_5V_CTRL_CCL_2,

				0x3F, 0x3F);

	} else {

		snd_soc_update_bits(codec, AQT1000_BUCK_5V_IBIAS_CTL_4,

		snd_soc_component_update_bits(component,

				AQT1000_BUCK_5V_IBIAS_CTL_4,

				0x70, (I_1UA << 4));

		snd_soc_update_bits(codec, AQT1000_BUCK_5V_IBIAS_CTL_4,

		snd_soc_component_update_bits(component,

				AQT1000_BUCK_5V_IBIAS_CTL_4,

				0x07, I_1UA);

		snd_soc_update_bits(codec, AQT1000_BUCK_5V_CTRL_CCL_2,

		snd_soc_component_update_bits(component,

				AQT1000_BUCK_5V_CTRL_CCL_2,

				0x3F, 0x20);

	}

}



static inline void aqt_clsh_rdac_hd2_ctl(struct snd_soc_codec *codec,

static inline void aqt_clsh_rdac_hd2_ctl(struct snd_soc_component *component,

					 u8 hd2_div_ctl, u8 state)

{

	u16 reg = 0;
@@ -374,34 +395,41 @@ static inline void aqt_clsh_rdac_hd2_ctl(struct snd_soc_codec *codec, 
	else if (state == AQT_CLSH_STATE_HPHR)

		reg = AQT1000_HPH_NEW_INT_RDAC_HD2_CTL_R;

	else

		dev_err(codec->dev, "%s: Invalid state: %d\n",

		dev_err(component->dev, "%s: Invalid state: %d\n",

			__func__, state);

	if (!reg)

		snd_soc_update_bits(codec, reg, 0x0F, hd2_div_ctl);

		snd_soc_component_update_bits(component, reg,

					      0x0F, hd2_div_ctl);

}



static inline void aqt_clsh_force_iq_ctl(struct snd_soc_codec *codec,

static inline void aqt_clsh_force_iq_ctl(struct snd_soc_component *component,

					 int mode)

{

	if (mode == CLS_H_LOHIFI || mode == CLS_AB) {

		snd_soc_update_bits(codec, AQT1000_HPH_NEW_INT_PA_MISC2,

		snd_soc_component_update_bits(component,

				AQT1000_HPH_NEW_INT_PA_MISC2,

				0x20, 0x20);

		snd_soc_update_bits(codec, AQT1000_RX_BIAS_HPH_LOWPOWER,

		snd_soc_component_update_bits(component,

				AQT1000_RX_BIAS_HPH_LOWPOWER,

				0xF0, 0xC0);

		snd_soc_update_bits(codec, AQT1000_HPH_PA_CTL1,

		snd_soc_component_update_bits(component,

				AQT1000_HPH_PA_CTL1,

				0x0E, 0x02);

	} else {



		snd_soc_update_bits(codec, AQT1000_HPH_NEW_INT_PA_MISC2,

		snd_soc_component_update_bits(component,

				AQT1000_HPH_NEW_INT_PA_MISC2,

				0x20, 0x0);

		snd_soc_update_bits(codec, AQT1000_RX_BIAS_HPH_LOWPOWER,

		snd_soc_component_update_bits(component,

				AQT1000_RX_BIAS_HPH_LOWPOWER,

				0xF0, 0x80);

		snd_soc_update_bits(codec, AQT1000_HPH_PA_CTL1,

		snd_soc_component_update_bits(component,

				AQT1000_HPH_PA_CTL1,

				0x0E, 0x06);

	}

}



static void aqt_clsh_buck_ctrl(struct snd_soc_codec *codec,

static void aqt_clsh_buck_ctrl(struct snd_soc_component *component,

			       struct aqt_clsh_cdc_data *clsh_d,

			       int mode,

			       bool enable)
@@ -409,9 +437,10 @@ static void aqt_clsh_buck_ctrl(struct snd_soc_codec *codec, 
	/* enable/disable buck */

	if ((enable && (++clsh_d->buck_users == 1)) ||

	   (!enable && (--clsh_d->buck_users == 0)))

		snd_soc_update_bits(codec, AQT1000_ANA_RX_SUPPLIES,

		snd_soc_component_update_bits(component,

				AQT1000_ANA_RX_SUPPLIES,

				(1 << 7), (enable << 7));

	dev_dbg(codec->dev, "%s: buck_users %d, enable %d, mode: %s",

	dev_dbg(component->dev, "%s: buck_users %d, enable %d, mode: %s",

		__func__, clsh_d->buck_users, enable, mode_to_str(mode));

	/*

	 * 500us sleep is required after buck enable/disable
@@ -420,7 +449,7 @@ static void aqt_clsh_buck_ctrl(struct snd_soc_codec *codec, 
	usleep_range(500, 500 + AQT_USLEEP_RANGE);

}



static void aqt_clsh_flyback_ctrl(struct snd_soc_codec *codec,

static void aqt_clsh_flyback_ctrl(struct snd_soc_component *component,

				  struct aqt_clsh_cdc_data *clsh_d,

				  int mode,

				  bool enable)
@@ -428,12 +457,13 @@ static void aqt_clsh_flyback_ctrl(struct snd_soc_codec *codec, 
	/* enable/disable flyback */

	if ((enable && (++clsh_d->flyback_users == 1)) ||

	   (!enable && (--clsh_d->flyback_users == 0))) {

		snd_soc_update_bits(codec, AQT1000_ANA_RX_SUPPLIES,

		snd_soc_component_update_bits(component,

				AQT1000_ANA_RX_SUPPLIES,

				(1 << 6), (enable << 6));

		/* 100usec delay is needed as per HW requirement */

		usleep_range(100, 110);

	}

	dev_dbg(codec->dev, "%s: flyback_users %d, enable %d, mode: %s",

	dev_dbg(component->dev, "%s: flyback_users %d, enable %d, mode: %s",

		__func__, clsh_d->flyback_users, enable, mode_to_str(mode));

	/*

	 * 500us sleep is required after flyback enable/disable
@@ -442,7 +472,7 @@ static void aqt_clsh_flyback_ctrl(struct snd_soc_codec *codec, 
	usleep_range(500, 500 + AQT_USLEEP_RANGE);

}



static void aqt_clsh_set_hph_mode(struct snd_soc_codec *codec,

static void aqt_clsh_set_hph_mode(struct snd_soc_component *component,

				  int mode)

{

	u8 val = 0;
@@ -487,21 +517,22 @@ static void aqt_clsh_set_hph_mode(struct snd_soc_codec *codec, 
	if (mode == CLS_H_LOHIFI || mode == CLS_AB)

		val = 0x04;



	snd_soc_update_bits(codec, AQT1000_ANA_HPH, 0x0C, val);

	snd_soc_component_update_bits(component, AQT1000_ANA_HPH, 0x0C, val);

}



static void aqt_clsh_set_buck_regulator_mode(struct snd_soc_codec *codec,

					     int mode)

static void aqt_clsh_set_buck_regulator_mode(

			struct snd_soc_component *component, int mode)

{

	snd_soc_update_bits(codec, AQT1000_ANA_RX_SUPPLIES,

	snd_soc_component_update_bits(component, AQT1000_ANA_RX_SUPPLIES,

			    0x02, 0x00);

}



static void aqt_clsh_state_hph_st(struct snd_soc_codec *codec,

static void aqt_clsh_state_hph_st(struct snd_soc_component *component,

				  struct aqt_clsh_cdc_data *clsh_d,

				  u8 req_state, bool is_enable, int mode)

{

	dev_dbg(codec->dev, "%s: mode: %s, %s\n", __func__, mode_to_str(mode),

	dev_dbg(component->dev, "%s: mode: %s, %s\n", __func__,

		mode_to_str(mode),

		is_enable ? "enable" : "disable");



	if (mode == CLS_AB || mode == CLS_AB_HIFI)
@@ -509,158 +540,163 @@ static void aqt_clsh_state_hph_st(struct snd_soc_codec *codec, 


	if (is_enable) {

		if (req_state == AQT_CLSH_STATE_HPHL)

			snd_soc_update_bits(codec,

			snd_soc_component_update_bits(component,

					    AQT1000_CDC_RX1_RX_PATH_CFG0,

					    0x40, 0x40);

		if (req_state == AQT_CLSH_STATE_HPHR)

			snd_soc_update_bits(codec,

			snd_soc_component_update_bits(component,

					    AQT1000_CDC_RX2_RX_PATH_CFG0,

					    0x40, 0x40);

	} else {

		if (req_state == AQT_CLSH_STATE_HPHL)

			snd_soc_update_bits(codec,

			snd_soc_component_update_bits(component,

					    AQT1000_CDC_RX1_RX_PATH_CFG0,

					    0x40, 0x00);

		if (req_state == AQT_CLSH_STATE_HPHR)

			snd_soc_update_bits(codec,

			snd_soc_component_update_bits(component,

					    AQT1000_CDC_RX2_RX_PATH_CFG0,

					    0x40, 0x00);

	}

}



static void aqt_clsh_state_hph_r(struct snd_soc_codec *codec,

static void aqt_clsh_state_hph_r(struct snd_soc_component *component,

				 struct aqt_clsh_cdc_data *clsh_d,

				 u8 req_state, bool is_enable, int mode)

{

	dev_dbg(codec->dev, "%s: mode: %s, %s\n", __func__, mode_to_str(mode),

	dev_dbg(component->dev, "%s: mode: %s, %s\n", __func__,

		mode_to_str(mode),

		is_enable ? "enable" : "disable");



	if (mode == CLS_H_NORMAL) {

		dev_err(codec->dev, "%s: Normal mode not applicable for hph_r\n",

		dev_err(component->dev, "%s: Normal mode not applicable for hph_r\n",

			__func__);

		return;

	}



	if (is_enable) {

		if (mode != CLS_AB && mode != CLS_AB_HIFI) {

			aqt_enable_clsh_block(codec, clsh_d, true);

			aqt_enable_clsh_block(component, clsh_d, true);

			/*

			 * These K1 values depend on the Headphone Impedance

			 * For now it is assumed to be 16 ohm

			 */

			snd_soc_update_bits(codec, AQT1000_CDC_CLSH_K1_MSB,

			snd_soc_component_update_bits(component,

					AQT1000_CDC_CLSH_K1_MSB,

					0x0F, 0x00);

			snd_soc_update_bits(codec, AQT1000_CDC_CLSH_K1_LSB,

			snd_soc_component_update_bits(component,

					AQT1000_CDC_CLSH_K1_LSB,

					0xFF, 0xC0);

			snd_soc_update_bits(codec,

			snd_soc_component_update_bits(component,

					    AQT1000_CDC_RX2_RX_PATH_CFG0,

					    0x40, 0x40);

		}

		aqt_clsh_set_buck_regulator_mode(codec, mode);

		aqt_clsh_set_flyback_mode(codec, mode);

		aqt_clsh_gm3_boost_disable(codec, mode);

		aqt_clsh_flyback_dac_ctl(codec, VREF_N0P9V);

		aqt_clsh_mode_vref_ctl(codec, I2C);

		aqt_clsh_force_iq_ctl(codec, mode);

		aqt_clsh_rdac_hd2_ctl(codec, P82_0P77, req_state);

		aqt_clsh_flyback_ctrl(codec, clsh_d, mode, true);

		aqt_clsh_flyback_dac_ctl(codec, VREF_N1P827V);

		aqt_clsh_set_buck_mode(codec, mode);

		aqt_clsh_buck_ctrl(codec, clsh_d, mode, true);

		aqt_clsh_mode_vref_ctl(codec, CONTROLLER);

		aqt_clsh_buck_current_bias_ctl(codec, true);

		aqt_clsh_set_hph_mode(codec, mode);

		aqt_clsh_set_buck_regulator_mode(component, mode);

		aqt_clsh_set_flyback_mode(component, mode);

		aqt_clsh_gm3_boost_disable(component, mode);

		aqt_clsh_flyback_dac_ctl(component, VREF_N0P9V);

		aqt_clsh_mode_vref_ctl(component, I2C);

		aqt_clsh_force_iq_ctl(component, mode);

		aqt_clsh_rdac_hd2_ctl(component, P82_0P77, req_state);

		aqt_clsh_flyback_ctrl(component, clsh_d, mode, true);

		aqt_clsh_flyback_dac_ctl(component, VREF_N1P827V);

		aqt_clsh_set_buck_mode(component, mode);

		aqt_clsh_buck_ctrl(component, clsh_d, mode, true);

		aqt_clsh_mode_vref_ctl(component, CONTROLLER);

		aqt_clsh_buck_current_bias_ctl(component, true);

		aqt_clsh_set_hph_mode(component, mode);

	} else {

		aqt_clsh_set_hph_mode(codec, CLS_H_NORMAL);

		aqt_clsh_buck_current_bias_ctl(codec, false);

		aqt_clsh_set_hph_mode(component, CLS_H_NORMAL);

		aqt_clsh_buck_current_bias_ctl(component, false);



		if (mode != CLS_AB && mode != CLS_AB_HIFI) {

			snd_soc_update_bits(codec,

			snd_soc_component_update_bits(component,

					    AQT1000_CDC_RX2_RX_PATH_CFG0,

					    0x40, 0x00);

			aqt_enable_clsh_block(codec, clsh_d, false);

			aqt_enable_clsh_block(component, clsh_d, false);

		}

		/* buck and flyback set to default mode and disable */

		aqt_clsh_buck_ctrl(codec, clsh_d, CLS_H_NORMAL, false);

		aqt_clsh_flyback_ctrl(codec, clsh_d, CLS_H_NORMAL, false);

		aqt_clsh_rdac_hd2_ctl(codec, P5_0P35, req_state);

		aqt_clsh_force_iq_ctl(codec, CLS_H_NORMAL);

		aqt_clsh_gm3_boost_disable(codec, CLS_H_NORMAL);

		aqt_clsh_set_flyback_mode(codec, CLS_H_NORMAL);

		aqt_clsh_set_buck_mode(codec, CLS_H_NORMAL);

		aqt_clsh_set_buck_regulator_mode(codec, CLS_H_NORMAL);

		aqt_clsh_buck_ctrl(component, clsh_d, CLS_H_NORMAL, false);

		aqt_clsh_flyback_ctrl(component, clsh_d, CLS_H_NORMAL, false);

		aqt_clsh_rdac_hd2_ctl(component, P5_0P35, req_state);

		aqt_clsh_force_iq_ctl(component, CLS_H_NORMAL);

		aqt_clsh_gm3_boost_disable(component, CLS_H_NORMAL);

		aqt_clsh_set_flyback_mode(component, CLS_H_NORMAL);

		aqt_clsh_set_buck_mode(component, CLS_H_NORMAL);

		aqt_clsh_set_buck_regulator_mode(component, CLS_H_NORMAL);

	}

}



static void aqt_clsh_state_hph_l(struct snd_soc_codec *codec,

static void aqt_clsh_state_hph_l(struct snd_soc_component *component,

				 struct aqt_clsh_cdc_data *clsh_d,

				 u8 req_state, bool is_enable, int mode)

{

	dev_dbg(codec->dev, "%s: mode: %s, %s\n", __func__, mode_to_str(mode),

		is_enable ? "enable" : "disable");

	dev_dbg(component->dev, "%s: mode: %s, %s\n", __func__,

		mode_to_str(mode), is_enable ? "enable" : "disable");



	if (mode == CLS_H_NORMAL) {

		dev_err(codec->dev, "%s: Normal mode not applicable for hph_l\n",

		dev_err(component->dev, "%s: Normal mode not applicable for hph_l\n",

			__func__);

		return;

	}



	if (is_enable) {

		if (mode != CLS_AB && mode != CLS_AB_HIFI) {

			aqt_enable_clsh_block(codec, clsh_d, true);

			aqt_enable_clsh_block(component, clsh_d, true);

			/*

			 * These K1 values depend on the Headphone Impedance

			 * For now it is assumed to be 16 ohm

			 */

			snd_soc_update_bits(codec, AQT1000_CDC_CLSH_K1_MSB,

			snd_soc_component_update_bits(component,

					AQT1000_CDC_CLSH_K1_MSB,

					0x0F, 0x00);

			snd_soc_update_bits(codec, AQT1000_CDC_CLSH_K1_LSB,

			snd_soc_component_update_bits(component,

					AQT1000_CDC_CLSH_K1_LSB,

					0xFF, 0xC0);

			snd_soc_update_bits(codec,

			snd_soc_component_update_bits(component,

					AQT1000_CDC_RX1_RX_PATH_CFG0,

					0x40, 0x40);

		}

		aqt_clsh_set_buck_regulator_mode(codec, mode);

		aqt_clsh_set_flyback_mode(codec, mode);

		aqt_clsh_gm3_boost_disable(codec, mode);

		aqt_clsh_flyback_dac_ctl(codec, VREF_N0P9V);

		aqt_clsh_mode_vref_ctl(codec, I2C);

		aqt_clsh_force_iq_ctl(codec, mode);

		aqt_clsh_rdac_hd2_ctl(codec, P82_0P77, req_state);

		aqt_clsh_flyback_ctrl(codec, clsh_d, mode, true);

		aqt_clsh_flyback_dac_ctl(codec, VREF_N1P827V);

		aqt_clsh_set_buck_mode(codec, mode);

		aqt_clsh_buck_ctrl(codec, clsh_d, mode, true);

		aqt_clsh_mode_vref_ctl(codec, CONTROLLER);

		aqt_clsh_buck_current_bias_ctl(codec, true);

		aqt_clsh_set_hph_mode(codec, mode);

		aqt_clsh_set_buck_regulator_mode(component, mode);

		aqt_clsh_set_flyback_mode(component, mode);

		aqt_clsh_gm3_boost_disable(component, mode);

		aqt_clsh_flyback_dac_ctl(component, VREF_N0P9V);

		aqt_clsh_mode_vref_ctl(component, I2C);

		aqt_clsh_force_iq_ctl(component, mode);

		aqt_clsh_rdac_hd2_ctl(component, P82_0P77, req_state);

		aqt_clsh_flyback_ctrl(component, clsh_d, mode, true);

		aqt_clsh_flyback_dac_ctl(component, VREF_N1P827V);

		aqt_clsh_set_buck_mode(component, mode);

		aqt_clsh_buck_ctrl(component, clsh_d, mode, true);

		aqt_clsh_mode_vref_ctl(component, CONTROLLER);

		aqt_clsh_buck_current_bias_ctl(component, true);

		aqt_clsh_set_hph_mode(component, mode);

	} else {

		aqt_clsh_set_hph_mode(codec, CLS_H_NORMAL);

		aqt_clsh_buck_current_bias_ctl(codec, false);

		aqt_clsh_set_hph_mode(component, CLS_H_NORMAL);

		aqt_clsh_buck_current_bias_ctl(component, false);



		if (mode != CLS_AB && mode != CLS_AB_HIFI) {

			snd_soc_update_bits(codec,

			snd_soc_component_update_bits(component,

					    AQT1000_CDC_RX1_RX_PATH_CFG0,

					    0x40, 0x00);

			aqt_enable_clsh_block(codec, clsh_d, false);

			aqt_enable_clsh_block(component, clsh_d, false);

		}

		/* set buck and flyback to Default Mode */

		aqt_clsh_buck_ctrl(codec, clsh_d, CLS_H_NORMAL, false);

		aqt_clsh_flyback_ctrl(codec, clsh_d, CLS_H_NORMAL, false);

		aqt_clsh_rdac_hd2_ctl(codec, P5_0P35, req_state);

		aqt_clsh_force_iq_ctl(codec, CLS_H_NORMAL);

		aqt_clsh_gm3_boost_disable(codec, CLS_H_NORMAL);

		aqt_clsh_set_flyback_mode(codec, CLS_H_NORMAL);

		aqt_clsh_set_buck_mode(codec, CLS_H_NORMAL);

		aqt_clsh_set_buck_regulator_mode(codec, CLS_H_NORMAL);

		aqt_clsh_buck_ctrl(component, clsh_d, CLS_H_NORMAL, false);

		aqt_clsh_flyback_ctrl(component, clsh_d, CLS_H_NORMAL, false);

		aqt_clsh_rdac_hd2_ctl(component, P5_0P35, req_state);

		aqt_clsh_force_iq_ctl(component, CLS_H_NORMAL);

		aqt_clsh_gm3_boost_disable(component, CLS_H_NORMAL);

		aqt_clsh_set_flyback_mode(component, CLS_H_NORMAL);

		aqt_clsh_set_buck_mode(component, CLS_H_NORMAL);

		aqt_clsh_set_buck_regulator_mode(component, CLS_H_NORMAL);

	}

}



static void aqt_clsh_state_err(struct snd_soc_codec *codec,

static void aqt_clsh_state_err(struct snd_soc_component *component,

		struct aqt_clsh_cdc_data *clsh_d,

		u8 req_state, bool is_enable, int mode)

{

	dev_err(codec->dev,

	dev_err(component->dev,

		"%s Wrong request for class H state machine requested to %s %s",

		__func__, is_enable ? "enable" : "disable",

		state_to_str[req_state]);
@@ -687,14 +723,14 @@ static bool aqt_clsh_is_state_valid(u8 state) 


/*

 * Function: aqt_clsh_fsm

 * Params: codec, cdc_clsh_d, req_state, req_type, clsh_event

 * Params: component, cdc_clsh_d, req_state, req_type, clsh_event

 * Description:

 * This function handles PRE DAC and POST DAC conditions of different devices

 * and updates class H configuration of different combination of devices

 * based on validity of their states. cdc_clsh_d will contain current

 * class h state information

 */

void aqt_clsh_fsm(struct snd_soc_codec *codec,

void aqt_clsh_fsm(struct snd_soc_component *component,

		struct aqt_clsh_cdc_data *cdc_clsh_d,

		u8 clsh_event, u8 req_state,

		int int_mode)
@@ -707,22 +743,22 @@ void aqt_clsh_fsm(struct snd_soc_codec *codec, 
		new_state = old_state | req_state;



		if (!aqt_clsh_is_state_valid(new_state)) {

			dev_err(codec->dev,

			dev_err(component->dev,

				"%s: Class-H not a valid new state: %s\n",

				__func__, state_to_str[new_state]);

			return;

		}

		if (new_state == old_state) {

			dev_err(codec->dev,

			dev_err(component->dev,

				"%s: Class-H already in requested state: %s\n",

				__func__, state_to_str[new_state]);

			return;

		}

		cdc_clsh_d->state = new_state;

		aqt_clsh_set_int_mode(cdc_clsh_d, req_state, int_mode);

		(*clsh_state_fp[new_state]) (codec, cdc_clsh_d, req_state,

		(*clsh_state_fp[new_state]) (component, cdc_clsh_d, req_state,

					     CLSH_REQ_ENABLE, int_mode);

		dev_dbg(codec->dev,

		dev_dbg(component->dev,

			"%s: ClassH state transition from %s to %s\n",

			__func__, state_to_str[old_state],

			state_to_str[cdc_clsh_d->state]);
@@ -732,23 +768,23 @@ void aqt_clsh_fsm(struct snd_soc_codec *codec, 
		new_state = old_state & (~req_state);

		if (new_state < NUM_CLSH_STATES) {

			if (!aqt_clsh_is_state_valid(old_state)) {

				dev_err(codec->dev,

				dev_err(component->dev,

					"%s:Invalid old state:%s\n",

					__func__, state_to_str[old_state]);

				return;

			}

			if (new_state == old_state) {

				dev_err(codec->dev,

				dev_err(component->dev,

					"%s: Class-H already in requested state: %s\n",

					__func__,state_to_str[new_state]);

				return;

			}

			(*clsh_state_fp[old_state]) (codec, cdc_clsh_d,

			(*clsh_state_fp[old_state]) (component, cdc_clsh_d,

					req_state, CLSH_REQ_DISABLE,

					int_mode);

			cdc_clsh_d->state = new_state;

			aqt_clsh_set_int_mode(cdc_clsh_d, req_state, CLS_NONE);

			dev_dbg(codec->dev, "%s: ClassH state transition from %s to %s\n",

			dev_dbg(component->dev, "%s: ClassH state transition from %s to %s\n",

				__func__, state_to_str[old_state],

				state_to_str[cdc_clsh_d->state]);

		}

asoc/codecs/aqt1000/aqt1000-clsh.h

+3 −3
Original line number Diff line number Diff line
@@ -94,14 +94,14 @@ struct aqt_reg_mask_val { 
	u8 val;

};



extern void aqt_clsh_fsm(struct snd_soc_codec *codec,

extern void aqt_clsh_fsm(struct snd_soc_component *component,

		struct aqt_clsh_cdc_data *cdc_clsh_d,

		u8 clsh_event, u8 req_state,

		int int_mode);



extern void aqt_clsh_init(struct aqt_clsh_cdc_data *clsh);

extern int aqt_clsh_get_clsh_state(struct aqt_clsh_cdc_data *clsh);

extern void aqt_clsh_imped_config(struct snd_soc_codec *codec, int imped,

		bool reset);

extern void aqt_clsh_imped_config(struct snd_soc_component *component,

		int imped, bool reset);



#endif /* _AQT1000_CLSH_H */

asoc/codecs/aqt1000/aqt1000-irq.c

+3 −1
Original line number Diff line number Diff line
@@ -154,6 +154,7 @@ static struct irq_chip aqt_irq_chip = { 
};



static struct lock_class_key aqt_irq_lock_class;

static struct lock_class_key aqt_irq_lock_requested_class;



static int aqt_irq_map(struct irq_domain *irqd, unsigned int virq,

			irq_hw_number_t hw)
@@ -162,7 +163,8 @@ static int aqt_irq_map(struct irq_domain *irqd, unsigned int virq, 


	irq_set_chip_data(virq, data);

	irq_set_chip_and_handler(virq, &aqt_irq_chip, handle_simple_irq);

	irq_set_lockdep_class(virq, &aqt_irq_lock_class);

	irq_set_lockdep_class(virq, &aqt_irq_lock_class,

			      &aqt_irq_lock_requested_class);

	irq_set_nested_thread(virq, 1);

	irq_set_noprobe(virq);