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Commit 159ffb3a authored by Lennert Buytenhek's avatar Lennert Buytenhek Committed by Nicolas Pitre
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Orion: general cleanup



Various Orion cleanups:
- Unify GPL license banner format across all files.
- Unify naming of .h double inclusion guard preprocessor macros.
- Unify spelling of "PCIe" (variants seen: PCIE, PCIe, PCI-EX.)
- Various typo fixes.
- Remove __init attributes from prototypes declared in headers.
- Remove trailing comments from #endif statements.
- Mark a couple of locally-used-only structs static.

Signed-off-by: default avatarLennert Buytenhek <buytenh@marvell.com>
Reviewed-by: default avatarTzachi Perelstein <tzachi@marvell.com>
Acked-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: default avatarNicolas Pitre <nico@marvell.com>
parent d50c60a8
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+4 −4
Original line number Diff line number Diff line
@@ -45,9 +45,9 @@
 * Generic Address Decode Windows bit settings
 */
#define TARGET_DDR		0
#define TARGET_DEV_BUS		1
#define TARGET_PCI		3
#define TARGET_PCIE		4
#define TARGET_DEV_BUS		1
#define ATTR_DDR_CS(n)		(((n) ==0) ? 0xe :	\
				((n) == 1) ? 0xd :	\
				((n) == 2) ? 0xb :	\
@@ -64,7 +64,7 @@
#define WIN_EN			1

/*
 * Helpers to get DDR banks info
 * Helpers to get DDR bank info
 */
#define DDR_BASE_CS(n)		ORION_DDR_REG(0x1500 + ((n) * 8))
#define DDR_SIZE_CS(n)		ORION_DDR_REG(0x1504 + ((n) * 8))
+3 −3
Original line number Diff line number Diff line
@@ -363,7 +363,7 @@ void __init orion_init(void)
	orion_setup_eth_wins();

	/*
	 * REgister devices
	 * Register devices.
	 */
	platform_device_register(&orion_uart);
	platform_device_register(&orion_ehci0);
+10 −9
Original line number Diff line number Diff line
#ifndef __ARCH_ORION_COMMON_H__
#define __ARCH_ORION_COMMON_H__
#ifndef __ARCH_ORION_COMMON_H
#define __ARCH_ORION_COMMON_H

/*
 * Basic Orion init functions used early by machine-setup.
 */

void __init orion_map_io(void);
void __init orion_init_irq(void);
void __init orion_init(void);
void orion_map_io(void);
void orion_init_irq(void);
void orion_init(void);
extern struct sys_timer orion_timer;

/*
@@ -43,7 +43,7 @@ struct pci_bus *orion_pci_sys_scan_bus(int nr, struct pci_sys_data *sys);
 * (/mach-orion/gpio.c).
 */

void __init orion_gpio_set_valid_pins(u32 pins);
void orion_gpio_set_valid_pins(u32 pins);
void gpio_display(void);	/* debug */

/*
@@ -52,7 +52,7 @@ void gpio_display(void); /* debug */

struct mv643xx_eth_platform_data;

void __init orion_eth_init(struct mv643xx_eth_platform_data *eth_data);
void orion_eth_init(struct mv643xx_eth_platform_data *eth_data);

/*
 * Orion Sata platform_data, used by machine-setup
@@ -60,7 +60,7 @@ void __init orion_eth_init(struct mv643xx_eth_platform_data *eth_data);

struct mv_sata_platform_data;

void __init orion_sata_init(struct mv_sata_platform_data *sata_data);
void orion_sata_init(struct mv_sata_platform_data *sata_data);

struct machine_desc;
struct meminfo;
@@ -68,4 +68,5 @@ struct tag;
extern void __init tag_fixup_mem32(struct machine_desc *, struct tag *,
				   char **, struct meminfo *);

#endif /* __ARCH_ORION_COMMON_H__ */

#endif
+16 −16
Original line number Diff line number Diff line
/*
 * arch/arm/mach-orion/pci.c
 *
 * PCI and PCIE functions for Marvell Orion System On Chip
 * PCI and PCIe functions for Marvell Orion System On Chip
 *
 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
 *
@@ -18,12 +18,12 @@
#include "common.h"

/*****************************************************************************
 * Orion has one PCIE controller and one PCI controller.
 * Orion has one PCIe controller and one PCI controller.
 *
 * Note1: The local PCIE bus number is '0'. The local PCI bus number
 * follows the scanned PCIE bridged busses, if any.
 * Note1: The local PCIe bus number is '0'. The local PCI bus number
 * follows the scanned PCIe bridged busses, if any.
 *
 * Note2: It is possible for PCI/PCIE agents to access many subsystem's
 * Note2: It is possible for PCI/PCIe agents to access many subsystem's
 * space, by configuring BARs and Address Decode Windows, e.g. flashes on
 * device bus, Orion registers, etc. However this code only enable the
 * access to DDR banks.
@@ -31,7 +31,7 @@


/*****************************************************************************
 * PCIE controller
 * PCIe controller
 ****************************************************************************/
#define PCIE_BASE	((void __iomem *)ORION_PCIE_VIRT_BASE)

@@ -67,7 +67,7 @@ static int pcie_valid_config(int bus, int dev)


/*
 * PCIE config cycles are done by programming the PCIE_CONF_ADDR register
 * PCIe config cycles are done by programming the PCIE_CONF_ADDR register
 * and then reading the PCIE_CONF_DATA register. Need to make sure these
 * transactions are atomic.
 */
@@ -133,7 +133,7 @@ static int pcie_wr_conf(struct pci_bus *bus, u32 devfn,
	return ret;
}

struct pci_ops pcie_ops = {
static struct pci_ops pcie_ops = {
	.read = pcie_rd_conf,
	.write = pcie_wr_conf,
};
@@ -170,23 +170,23 @@ static int __init pcie_setup(struct pci_sys_data *sys)
	/*
	 * IORESOURCE_IO
	 */
	res[0].name = "PCI-EX I/O Space";
	res[0].name = "PCIe I/O Space";
	res[0].flags = IORESOURCE_IO;
	res[0].start = ORION_PCIE_IO_BUS_BASE;
	res[0].end = res[0].start + ORION_PCIE_IO_SIZE - 1;
	if (request_resource(&ioport_resource, &res[0]))
		panic("Request PCIE IO resource failed\n");
		panic("Request PCIe IO resource failed\n");
	sys->resource[0] = &res[0];

	/*
	 * IORESOURCE_MEM
	 */
	res[1].name = "PCI-EX Memory Space";
	res[1].name = "PCIe Memory Space";
	res[1].flags = IORESOURCE_MEM;
	res[1].start = ORION_PCIE_MEM_PHYS_BASE;
	res[1].end = res[1].start + ORION_PCIE_MEM_SIZE - 1;
	if (request_resource(&iomem_resource, &res[1]))
		panic("Request PCIE Memory resource failed\n");
		panic("Request PCIe Memory resource failed\n");
	sys->resource[1] = &res[1];

	sys->resource[2] = NULL;
@@ -351,7 +351,7 @@ static int orion_pci_wr_conf(struct pci_bus *bus, u32 devfn,
					PCI_FUNC(devfn), where, size, val);
}

struct pci_ops pci_ops = {
static struct pci_ops pci_ops = {
	.read = orion_pci_rd_conf,
	.write = orion_pci_wr_conf,
};
@@ -508,7 +508,7 @@ static int __init pci_setup(struct pci_sys_data *sys)


/*****************************************************************************
 * General PCIE + PCI
 * General PCIe + PCI
 ****************************************************************************/
static void __devinit rc_pci_fixup(struct pci_dev *dev)
{
+1 −1
Original line number Diff line number Diff line
/*
 * linux/include/asm-arm/arch-orion/debug-macro.S
 * include/asm-arm/arch-orion/debug-macro.S
 *
 * Debugging macro include header
 *
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