Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1554b989 authored by Takeshi Kihara's avatar Takeshi Kihara Committed by Geert Uytterhoeven
Browse files

pinctrl: sh-pfc: r8a7796: Fix IPSR setting for MSIOF3_SS1_E pin 



This patch fixes the IPSR register setting when the MSIOF3_SS1_E pin
function is selected.

This is a correction to the incorrect implementation of IPSR register
pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware
User's Manual Rev.0.51E or later.

Fixes: f9aece73 ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: default avatarTakeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Reword]
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 70070190

drivers/pinctrl/sh-pfc/pfc-r8a7796.c

+1 −1
Original line number Diff line number Diff line
@@ -645,7 +645,7 @@ static const u16 pinmux_data[] = { 
	PINMUX_IPSR_MSEL(IP0_31_28,	VI4_DATA1_B,		SEL_VIN4_1),

	PINMUX_IPSR_MSEL(IP0_31_28,	CAN0_RX_B,		SEL_RCAN0_1),

	PINMUX_IPSR_MSEL(IP0_31_28,	CANFD0_RX_B,		SEL_CANFD0_1),

	PINMUX_IPSR_MSEL(IP0_27_24,	MSIOF3_SS1_E,		SEL_MSIOF3_4),

	PINMUX_IPSR_MSEL(IP0_31_28,	MSIOF3_SS1_E,		SEL_MSIOF3_4),



	/* IPSR1 */

	PINMUX_IPSR_GPSR(IP1_3_0,	IRQ2),