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Commit 154013ea authored by Bartlomiej Zolnierkiewicz's avatar Bartlomiej Zolnierkiewicz Committed by Eduardo Valentin
Browse files

thermal: exynos: add get_emul_con_reg() helper 



Factor out code for preparing EMUL_CON register value from
exynos_tmu_set_emulation() into get_emul_con_reg().

This is a preparation for introducing per-SoC type
tmu_set_emulation method.

There should be no functional changes caused by this patch.

Cc: Amit Daniel Kachhap <amit.daniel@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Tested-by: default avatarLukasz Majewski <l.majewski@samsung.com>
Signed-off-by: default avatarEduardo Valentin <edubezval@gmail.com>
parent b79985ca

drivers/thermal/samsung/exynos_tmu.c

+23 −15
Original line number Diff line number Diff line
@@ -438,6 +438,28 @@ static int exynos_tmu_read(struct exynos_tmu_data *data) 
}



#ifdef CONFIG_THERMAL_EMULATION

static u32 get_emul_con_reg(struct exynos_tmu_data *data, unsigned int val,

			    unsigned long temp)

{

	struct exynos_tmu_platform_data *pdata = data->pdata;



	if (temp) {

		temp /= MCELSIUS;



		if (TMU_SUPPORTS(pdata, EMUL_TIME)) {

			val &= ~(EXYNOS_EMUL_TIME_MASK << EXYNOS_EMUL_TIME_SHIFT);

			val |= (EXYNOS_EMUL_TIME << EXYNOS_EMUL_TIME_SHIFT);

		}

		val &= ~(EXYNOS_EMUL_DATA_MASK << EXYNOS_EMUL_DATA_SHIFT);

		val |= (temp_to_code(data, temp) << EXYNOS_EMUL_DATA_SHIFT) |

			EXYNOS_EMUL_ENABLE;

	} else {

		val &= ~EXYNOS_EMUL_ENABLE;

	}



	return val;

}



static int exynos_tmu_set_emulation(void *drv_data, unsigned long temp)

{

	struct exynos_tmu_data *data = drv_data;
@@ -456,21 +478,7 @@ static int exynos_tmu_set_emulation(void *drv_data, unsigned long temp) 
	clk_enable(data->clk);



	val = readl(data->base + reg->emul_con);



	if (temp) {

		temp /= MCELSIUS;



		if (TMU_SUPPORTS(pdata, EMUL_TIME)) {

			val &= ~(EXYNOS_EMUL_TIME_MASK << EXYNOS_EMUL_TIME_SHIFT);

			val |= (EXYNOS_EMUL_TIME << EXYNOS_EMUL_TIME_SHIFT);

		}

		val &= ~(EXYNOS_EMUL_DATA_MASK << EXYNOS_EMUL_DATA_SHIFT);

		val |= (temp_to_code(data, temp) << EXYNOS_EMUL_DATA_SHIFT) |

			EXYNOS_EMUL_ENABLE;

	} else {

		val &= ~EXYNOS_EMUL_ENABLE;

	}



	val = get_emul_con_reg(data, val, temp);

	writel(val, data->base + reg->emul_con);



	clk_disable(data->clk);