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Commit 1511c75b authored by Tomi Valkeinen's avatar Tomi Valkeinen
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OMAPDSS: fix AM43xx minimum pixel clock divider 



AM43xx supports pixel clock divider of 1, just like all OMAP3+ SoCs. Fix
the minimum divider value.

Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
parent c517d838

drivers/video/fbdev/omap2/dss/dss_features.c

+1 −1
Original line number Diff line number Diff line
@@ -440,7 +440,7 @@ static const struct dss_param_range omap3_dss_param_range[] = { 


static const struct dss_param_range am43xx_dss_param_range[] = {

	[FEAT_PARAM_DSS_FCK]			= { 0, 200000000 },

	[FEAT_PARAM_DSS_PCD]			= { 2, 255 },

	[FEAT_PARAM_DSS_PCD]			= { 1, 255 },

	[FEAT_PARAM_DOWNSCALE]			= { 1, 4 },

	[FEAT_PARAM_LINEWIDTH]			= { 1, 1024 },

};