Merge branch 'linus' into x86/fpu, to pick up fixes

	    <entry><constant>MEDIA_ENT_F_CONN_COMPOSITE</constant></entry>

	    <entry>Connector for a RGB composite signal.</entry>

	  </row>

	  <row>

	    <entry><constant>MEDIA_ENT_F_CONN_TEST</constant></entry>

	    <entry>Connector for a test generator.</entry>

	  </row>

	  <row>

	    <entry><constant>MEDIA_ENT_F_CAM_SENSOR</constant></entry>

	    <entry>Camera video sensor entity.</entry>

conventions of cgroup v2.  It describes all userland-visible aspects

of cgroup including core and specific controller behaviors.  All

future changes must be reflected in this document.  Documentation for

v1 is available under Documentation/cgroup-legacy/.

v1 is available under Documentation/cgroup-v1/.

CONTENTS

clock-output-names:

 - "xin24m" - crystal input - required,

 - "ext_i2s" - external I2S clock - optional,

 - "ext_gmac" - external GMAC clock - optional

 - "rmii_clkin" - external EMAC clock - optional

Example: Clock controller node:

		1 = edge triggered

		4 = level triggered

  Cells 4 and beyond are reserved for future use. When the 1st cell

  has a value of 0 or 1, cells 4 and beyond act as padding, and may be

  ignored. It is recommended that padding cells have a value of 0.

  Cells 4 and beyond are reserved for future use and must have a value

  of 0 if present.

- reg : Specifies base physical address(s) and size of the GIC

  registers, in the following order:

				  "ch16", "ch17", "ch18", "ch19",

				  "ch20", "ch21", "ch22", "ch23",

				  "ch24";

		clocks = <&mstp8_clks R8A7795_CLK_ETHERAVB>;

		power-domains = <&cpg_clocks>;

		clocks = <&cpg CPG_MOD 812>;

		power-domains = <&cpg>;

		phy-mode = "rgmii-id";

		phy-handle = <&phy0>;